Memory Fail Tracking for Prioritized Post-Package Repair
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Solution Overview
Problem
Existing memory devices lack effective methods to identify and prioritize the worst memory rows for post-package repair (PPR) operations, as they only track the absolute worst memory row and do not account for other rows with significant errors or error types, limiting the efficient use of limited redundant memory resources.
Innovation Solution
Implement fail tracking circuitry that tracks and logs error counts and addresses of multiple memory rows during error check and scrub operations, allowing identification of the worst memory rows based on error severity and type, facilitating more intelligent PPR decisions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If only the absolute worst memory row is tracked, then the tracking mechanism remains simple, but the ability to prioritize multiple memory rows for repair is limited
Solution Approach 1:
The fail tracking circuitry is segmented into multiple independent tracking entries, each capable of storing fail information for a different memory row. This allows the system to track multiple memory rows simultaneously without requiring a completely new architectural approach, thus improving reliability while controlling complexity growth.
Solution Approach 2:
The system transitions from tracking a single memory row to tracking multiple memory rows by adding a dimensional aspect to the tracking structure. This enables prioritization of multiple rows based on their fail characteristics, enhancing repair effectiveness without proportionally increasing circuit complexity.
2Measurement precision
If comprehensive fail information is collected for all memory rows, then the accuracy of repair prioritization improves, but the storage resources required increase
Solution Approach 1:
Instead of uniformly tracking all memory rows with the same level of detail, the system applies local quality by selectively tracking only those memory rows that exhibit fail characteristics. This allows comprehensive error detection accuracy for problematic rows while reducing storage resources by not tracking rows without significant fail information.
Solution Approach 2:
The system implements partial action by tracking only the necessary fail information for memory rows that require attention, rather than collecting comprehensive data for all rows. This balances measurement precision for repair prioritization with storage resource consumption by focusing on partial but critical information.
3Reliability
If redundant memory resources are allocated without prioritization, then the safety margin is maintained, but the efficiency of resource utilization decreases
Solution Approach 1:
The system performs preliminary action by identifying and tracking memory rows with significant fail characteristics before repair operations are needed. This enables proactive prioritization of repair candidates, improving both the safety margin through better-informed decisions and the efficiency of resource utilization by targeting the most critical rows first.
Solution Approach 2:
The fail tracking circuitry provides feedback about the relative severity of different memory row failures, enabling intelligent prioritization of repair operations. This feedback mechanism allows the system to maintain data protection capability while significantly improving repair efficiency by focusing resources on the most problematic rows rather than treating all rows equally.
Data Source
AI summary
Memory with enhanced fail tracking, and associated systems, devices, and methods, are disclosed herein. In one embodiment, a memory device comprises a memory array and fail tracking circuitry. The fail tracking circuitry can include a counter and a plurality of memory slots and can be configured to, for each memory row of a plurality of memory rows in a memory region of the memory array, (a) count errors detected in data read from the memory row to determine an error count, and (b) store the error count and address information for the memory row in a memory slot of the plurality of memory slots. In some embodiments, the fail tracking circuitry can be configured to count the errors and store the error counts during error check and scrub operations of the memory device (e.g., to identify the worst memory rows in the memory region for post-package repair operations).