Semiconductor Memory Fault Flags in Metadata for Real-Time ECC

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Solution Overview

Problem

Existing semiconductor memory devices lack a mechanism to provide real-time fault flags, which hinders efficient error detection and correction, particularly in high-performance applications like LPDDR6 memory, affecting data integrity and system stability.

Innovation Solution

A semiconductor memory device is designed to operate in a Reliability, Availability, and Serviceability (RAS) mode, where fault flags are inserted into metadata fields of data packets, enabling real-time error detection and correction through a link Error Correcting Code (ECC) mode, with fault flags and parity information transmitted via dedicated fields.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If fault flag insertion into metadata field is implemented, then real-time error detection capability is improved, but device complexity increases

Engineering Contradiction:

Improveerror detection capabilityVSAvoiddevice complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The fault flag is merged with the metadata field that already exists in the data packet structure. By combining the fault indication function with the existing metadata infrastructure, the patent achieves real-time error detection without requiring entirely separate complex fault reporting mechanisms.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The metadata field serves multiple functions: it carries existing metadata information and simultaneously transports fault flags. This multi-functionality allows the system to maintain real-time error detection capabilities while utilizing existing structural resources, thereby limiting the increase in device complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Reliability

If RAS mode is activated for real-time fault flag provision, then data integrity is improved, but overhead increases

Engineering Contradiction:

Improvedata integrityVSAvoidoverhead

Core Design Contradiction:

ReliabilityVSLoss of energy

Solution Approach 1:

Instead of applying error protection uniformly across all data transmission, the patent activates RAS mode and link ECC specifically when fault conditions are detected or when data integrity is critical. This localized application of reliability mechanisms reduces overall overhead while maintaining data integrity where needed.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The system continuously monitors fault conditions and adjusts its operation between meta mode and RAS mode based on real-time feedback. When faults are detected, the system transitions to RAS mode with fault flag insertion; when operations are normal, it operates in meta mode with lower overhead, thus optimizing the balance between data integrity and resource consumption.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS20250363001A1Semiconductor memory device supplying real-time fault flag and fault flag supplying method thereof

Publication Date: 2025.11.27 SAMSUNG ELECTRONICS CO LTD

AI summary

A method for providing a fault flag of a semiconductor memory device comprises changing the operation mode of the semiconductor memory device from a meta mode to a Reliability, Availability and Serviceability (RAS) mode, collecting a fault flag of the semiconductor memory device, inserting the fault flag into a metadata field of a data packet of the semiconductor memory device, and outputting the data packet into which the fault flag is inserted.