Memory Fault Isolation Using Row- and Bit-Level Location Detection
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Solution Overview
Problem
Current memory fault prediction systems, such as the baseboard management controller (BMC), cannot accurately determine the precise location of memory faults beyond a bank address, leading to low processing precision when row or bit faults occur.
Innovation Solution
The proposed method involves an out-of-band management module using machine learning algorithms to process memory information, determining fault locations at least to a row or bit address, and sending this information to processor firmware for precise memory isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the BMC predicts memory fault based on error information, then the memory fault can be detected and processed, but the fault location precision is limited to bank address level only
Solution Approach 1:
The patent segments the memory address into multiple hierarchical levels: bank address, row address, and bit address. By dividing the fault location determination into these segments, the system achieves higher precision (bit-level) without requiring a complete redesign of the BMC architecture. The out-of-band management module processes memory information through machine learning to extract segmented address components, resolving the contradiction between precision and complexity.
Solution Approach 2:
The patent introduces an out-of-band management module as an intermediary between the BMC and processor firmware. This intermediary module handles the complex machine learning-based analysis of memory information to determine precise fault locations, while the BMC maintains its原有 simplified fault detection function. The intermediary resolves the contradiction by offloading the complex precision-determination task to a dedicated component.
2Measurement precision
If the fault location is determined only to bank address level, then the system complexity remains low, but the processing precision of memory fault is insufficient
Solution Approach 1:
The patent implements preliminary action by having the out-of-band management module continuously monitor and analyze memory information using machine learning algorithms before faults occur. The system pre-processes memory information to identify patterns and potential fault locations, so when a fault actually occurs, the precise location (row address and bit address) can be immediately determined without time-consuming analysis during the fault event.
Solution Approach 2:
The patent replaces traditional mechanical/address-based fault detection methods with machine learning-based information processing. Instead of relying on simple address decoding at bank level, the system uses machine learning models to analyze memory information and predict precise fault locations (row and bit levels), achieving higher precision without proportionally increasing processing time during fault events.
3Measurement precision
If machine learning algorithms are used to process memory information, then fault location precision can be improved to row and bit address level, but the computational complexity increases
Solution Approach 1:
The patent introduces an out-of-band management module as an intermediary between the BMC and processor firmware. This intermediary module handles the complex machine learning-based analysis of memory information to determine precise fault locations, while the BMC maintains its原有 simplified fault detection function. The intermediary resolves the contradiction by offloading the complex precision-determination task to a dedicated component.
Solution Approach 2:
The patent segments the memory address into multiple hierarchical levels: bank address, row address, and bit address. By dividing the fault location determination into these segments, the system achieves higher precision (bit-level) without requiring a complete redesign of the BMC architecture. The out-of-band management module processes memory information through machine learning to extract segmented address components, resolving the contradiction between precision and complexity.
Data Source
AI summary
This application provides a fault processing method and a computing device. The method is applied to the computing device, and the computing device includes an out-of-band management module and processor firmware. The method includes: The out-of-band management module obtains memory information of a memory; the out-of-band management module determines fault information of the memory based on the memory information, where the fault information includes a fault location, and location precision included in the fault location is located at least at a row address of a fault; the out-of-band management module sends the fault information to the processor firmware; and the processor firmware isolates a memory at the fault location based on the fault information. In the foregoing method, a location that is in the memory and at which the fault occurs can be accurately determined, so that processing precision of the memory fault is improved.