Memory Access Feedback Signalling for Opportunistic Request Control

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing memory access systems struggle with inefficiencies due to the generation and processing of opportunistic memory access requests when the memory control circuitry is already busy, leading to increased processing time and memory bandwidth usage.

Innovation Solution

Implementing utilisation status determining circuitry to determine the utilisation of memory storage cells and feedback signalling circuitry to inform memory access request sources about the utilisation status, allowing them to adjust their requests accordingly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If opportunistic memory access requests are generated and processed continuously, then memory bandwidth utilization is improved, but processing time increases when memory control circuitry is busy

Engineering Contradiction:

Improvememory bandwidth utilizationVSAvoidprocessing time

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The patent implements feedback signalling circuitry that provides utilisation status information from the memory control circuitry to the memory access request source. This feedback mechanism allows the system to monitor memory controller busy status and adjust opportunistic request generation accordingly, resolving the contradiction by preventing request generation during high utilisation periods while maintaining it during low utilisation periods.

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The patent dynamically adjusts the generation of opportunistic memory access requests based on real-time utilisation status feedback. The system transitions from a static request generation approach to a dynamic one where the request rate adapts to current memory controller workload, thereby optimizing both bandwidth utilization and processing time.

Inventive Principle:

Principle #15Dynamics

2Loss of time

If utilisation status feedback signalling is implemented, then unnecessary opportunistic requests are reduced, but device complexity increases

Engineering Contradiction:

Improveprocessing timeVSAvoidcircuitry complexity

Core Design Contradiction:

Loss of timeVSDevice complexity

Solution Approach 1:

The feedback signalling circuitry is designed to provide multiple functions: it signals utilisation status for request rate control, provides visibility into memory controller state, and enables adaptive optimization. This multi-functionality justifies the added complexity by delivering multiple benefits from a single circuitry addition.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system implements self-service through automated feedback-driven control where the memory access request source autonomously adjusts its opportunistic request generation based on received utilisation status feedback, eliminating the need for external control mechanisms and reducing overall system complexity.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS20260003535A1Feedback signalling

Publication Date: 2026.01.01 ARM LTD

AI summary

An apparatus includes memory control circuitry to control access to at least one array of memory storage cells and to schedule received memory access requests targeting locations in the at least one array of memory storage cells. The apparatus also includes utilisation status determining circuitry to determine a utilisation status associated with accessing the array of memory storage cells, in which the utilisation status is indicative of a utilisation of a group of memory storage cells in the at least one array of memory storage cells. The apparatus includes feedback signalling circuitry to signal to a source of the received memory access requests feedback indicative of the determined utilisation status.