3D Memory Film Sidewalls for Discrete Charge Storage Integration

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Solution Overview

Problem

Existing three-dimensional memory devices face challenges in efficiently integrating discrete charge storage elements and achieving optimal structural configurations for enhanced performance and scalability.

Innovation Solution

The formation of a three-dimensional memory device involves an alternating stack of insulating and conductive layers with memory openings filled by structures comprising vertical semiconductor channels and memory films with specific sidewall configurations, including straight inner cylindrical sidewalls and laterally-undulating outer sidewalls with protrusions, and discrete charge storage elements spaced apart by lateral protrusions of insulating layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional three-dimensional memory structures are used, then manufacturing is simpler, but integration of discrete charge storage elements is inefficient

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidintegration efficiency of charge storage elements
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The memory structure is segmented into discrete charge storage elements separated by insulating layers, allowing independent control and efficient integration while maintaining manufacturability through systematic layer deposition processes

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from planar to three-dimensional vertical stacking of charge storage elements, enabling higher integration density and improved productivity by utilizing the vertical dimension for element integration

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Device complexity

If simple memory structures are used, then device complexity is lower, but scalability and performance are limited

Engineering Contradiction:
Improvestructural simplicityVSAvoidscalability and performance
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

Multiple charge storage elements are nested within a single memory device structure through vertical stacking, with each element separated by insulating layers, achieving high scalability and performance while managing complexity through hierarchical organization

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The memory device employs composite structures combining conductive charge storage elements with insulating separator layers, creating a multi-material system that enhances performance and scalability while providing clear structural definition to manage complexity

Inventive Principle:
Principle #40Composite materials

3Productivity

If charge storage elements are densely integrated, then productivity increases, but structural integrity may be compromised

Engineering Contradiction:
Improveintegration densityVSAvoidstructural integrity
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

Insulating layers are strategically positioned between charge storage elements to provide localized electrical isolation and structural support, enabling high integration density while preserving overall structural integrity through targeted reinforcement

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

Insulating layers serve as intermediary elements between charge storage structures, providing both electrical isolation to maintain signal integrity and mechanical support to preserve structural stability under high-density integration conditions

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12453088B2Three-dimensional memory device including discrete charge storage elements and methods of forming the same
Publication Date: 2025.10.21 SANDISK TECHNOLOGIES LLC
  • US12453088B2 patent drawing
  • US12453088B2 patent drawing
  • US12453088B2 patent drawing

AI summary

A memory device includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and including a vertical semiconductor channel and a memory film. The memory film includes a memory material layer having a straight inner cylindrical sidewall that vertically extends through a plurality of electrically conductive layers within the alternating stack without lateral undulation and a laterally-undulating outer sidewall having outward lateral protrusions at levels of the plurality of electrically conductive layers.