Memory Device Finger Regions Bias Voltage Optimization
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Solution Overview
Problem
As memory integration levels increase, the efficiency of programming memory cells in three-dimensional memory devices decreases, leading to negative impacts on performance.
Innovation Solution
The memory device includes a memory array with a first and second finger memory region, each comprising memory cell strings with bottom select transistors having different threshold voltages. The peripheral circuit applies specific bias and pass voltages to these transistors during pre-charge and sensing phases to optimize programming efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of memory cells connected with a same word line is increased to improve memory integration level, then memory integration level is improved, but the efficiency of programming memory cells decreases
Solution Approach 1:
The memory array is divided into multiple finger memory regions (first finger memory region and second finger memory region), each with different threshold voltages for bottom select transistors. This segmentation allows independent programming operations on different regions, reducing the coupling effect between memory cells and improving programming efficiency despite increased integration level
Solution Approach 2:
Different finger memory regions are assigned different threshold voltages for their bottom select transistors. The first finger memory region has bottom select transistors with a first threshold voltage while the second finger memory region has bottom select transistors with a second threshold voltage. This local differentiation enables selective activation of specific regions during programming operations, improving overall programming efficiency
2Reliability
If a high pass voltage is applied to all bottom select transistors to ensure reliable operation, then transistor reliability is improved, but threshold voltage shifts due to hot carrier injection increase
Solution Approach 1:
Different finger memory regions are assigned different threshold voltages for their bottom select transistors. The first finger memory region has bottom select transistors with a first threshold voltage while the second finger memory region has bottom select transistors with a second threshold voltage. This local differentiation enables selective activation of specific regions during programming operations, improving overall programming efficiency
Solution Approach 2:
The peripheral circuit dynamically adjusts the pass voltage applied to different bottom select transistor groups based on their specific threshold voltages. Instead of applying a uniform high pass voltage to all transistors, the system applies optimized pass voltages to each region, reducing unnecessary hot carrier injection while maintaining reliable operation
Data Source
AI summary
The present disclosure provides memory devices, operating methods, memory systems. An example memory device includes a memory array and a peripheral circuit. The memory array includes a first and a second finger memory region, each region including multiple memory cell strings. Each memory cell string includes a first bottom select transistor (BSG). First BSGs in the first and second finger memory regions have a first and a second threshold voltage, respectively. The peripheral circuit is configured to: apply a first bias voltage to the BSGs in the first pre-charge phase of a programming verification operation on the first finger memory region; apply a second bias voltage to the first BSGs after the first pre-charge phase; the first bias voltage is smaller than the second bias voltage; and the second bias voltage is smaller than the second threshold voltage and greater than the first threshold voltage.