Memory Controller Flip-Pattern Shifting for Faster ECC Decoding
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Solution Overview
Problem
Current memory systems face challenges in efficiently decoding multidimensional error correction codes, particularly when iterative decoding processes fail, leading to increased decoding latency due to the large number of possible flip patterns and overlapping error patterns.
Innovation Solution
The implementation of a memory system that uses a sequence generator to create a flip pattern by cyclically shifting initial flip positions, reducing the number of overlapping error patterns and improving decoding efficiency through the use of Multi-Bit Flip Decoding (MBFD) and other decoding methods like chase decoding, which determine the positions of symbols to be flipped based on specific decision rules.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If iterative decoding processes are used to decode multidimensional error correction codes, then error correction capability is improved, but decoding latency increases due to the large number of possible flip patterns
Solution Approach 1:
The patent applies partial action by performing MBFD only when iterative decoding fails, rather than exhaustively trying all possible flip patterns. The sequence generator produces flip patterns cyclically until decoding succeeds or a predetermined number of attempts is reached, avoiding unnecessary processing of all possible patterns while maintaining error correction capability.
Solution Approach 2:
The patent introduces dynamic adaptation by using a sequence generator that cyclically shifts flip patterns based on feedback from decoding attempts. The system adapts the decoding approach by switching between iterative decoding and MBFD based on success/failure conditions, optimizing the balance between error correction and latency.
2Reliability
If all possible flip patterns are processed to ensure successful decoding, then decoding success rate is improved, but the number of unnecessary error patterns processed increases
Solution Approach 1:
The patent processes only a predetermined number of flip patterns generated by cyclic shifting, rather than exhaustively processing all possible flip patterns. This partial processing approach maintains adequate decoding success rate while significantly improving decoding efficiency by avoiding unnecessary pattern processing.
Solution Approach 2:
The sequence generator pre-generates flip patterns through cyclic shifting before actual decoding attempts. This preliminary generation of a limited set of patterns allows the system to quickly try multiple candidates without the overhead of generating all possible patterns, improving decoding efficiency.
Data Source
AI summary
A memory system includes a nonvolatile memory and a memory controller. The nonvolatile memory stores a multidimensional error correction code in which each of a plurality of symbol groups is encoded by both a first component code and a second component code. The memory controller reads the error correction code from the nonvolatile memory, executes a first decoding process using the first component code and the second component code, and when the first decoding process fails, executes a second decoding process on an error symbol group. The second decoding process includes a process of selecting the positions of a plurality of symbols whose values included in the error symbol group are to be inverted according to a decision rule. The decision rule includes a rule for cyclically shifting a position selected for the second decoding process at to decide the position for the second decoding process at the next time.