Memory Region Frequency Mapping for Lower-Latency Host Access

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Solution Overview

Problem

The delay time of additional memory interfaces in computing systems is longer than primary interfaces, affecting data processing performance when using additional memories.

Innovation Solution

A memory system with a monitoring unit that generates and manages operation frequency information for unit storage regions and sub-regions, allowing efficient management of memory regions based on data characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If additional memory is used to increase usable memory size, then memory capacity is improved, but communication delay time increases

Engineering Contradiction:
Improveusable memory sizeVSAvoidcommunication delay time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The memory system is divided into multiple unit storage regions, each independently monitored for operation frequency. This segmentation allows the system to manage different memory regions with different characteristics, optimizing access patterns for each region while using additional memory capacity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system monitors and manages operation frequency information as a key parameter for each unit storage region. By tracking operation frequencies and using this information to optimize memory access patterns, the system can improve communication efficiency and reduce delay times when accessing additional memory regions.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If operation frequency monitoring is performed for each unit storage sub-region, then data management precision is improved, but device complexity increases

Engineering Contradiction:
Improveoperation frequency measurement precisionVSAvoidmonitoring unit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The monitoring function is segmented to operate at different levels: unit storage region level and unit storage sub-region level. This hierarchical segmentation allows precise monitoring where needed while avoiding unnecessary complexity in regions where coarse-grained monitoring suffices.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The monitoring unit is designed with multi-functionality, capable of monitoring operation frequencies at both unit storage region level and unit storage sub-region level. This universal design allows the same hardware structure to provide different levels of monitoring precision depending on the specific memory region characteristics.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250370921A1Control device, memory system and computing system
Publication Date: 2025.12.04 SK HYNIX INC
  • US20250370921A1 patent drawing
  • US20250370921A1 patent drawing
  • US20250370921A1 patent drawing

AI summary

In an embodiment of the present disclosure, operation frequency information on a memory region of a memory system is managed by the unit of a first size, and operation frequency information is managed by the unit of a second size smaller than the first size according to the operation frequency information by the unit of the first size. Therefore, by providing operation frequency information to a host device which is allocated and uses a memory region while efficiently using a storage space for operation frequency information, the management load of the host device may be reduced, and data processing performance by the host device may be improved.