Memory Device Fuse Option Inversion Logic
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Solution Overview
Problem
As the number of fuses in memory devices increases, it becomes inefficient and costly to include additional undo fuses or XOR fuses to invert options associated with blown fuses, leading to a substantial increase in device area.
Innovation Solution
A memory device uses a second set of spare fuses to selectively invert options associated with a first set of fuses, employing logic sequencing circuitry and option inversion logic circuitry to decode phases, lanes, and cycles, allowing for the selection of either a logic state or its inverted state without the need for additional undo or XOR fuses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If additional undo fuses or XOR fuses are included to invert options associated with blown fuses, then the flexibility to reconfigure parameters is improved, but the device area increases substantially
Solution Approach 1:
The patent makes existing fuse outputs serve multiple functions by using logic sequencing circuitry to broadcast fuse outputs across multiple lanes over time. The same fuse output can be used by multiple lanes sequentially, eliminating the need for dedicated undo fuses or XOR fuses for each lane, thereby maintaining reconfiguration flexibility without increasing device area
Solution Approach 2:
The patent introduces a time dimension to the fuse output distribution by sequencing fuse outputs across multiple phases and cycles. Instead of providing simultaneous fuse outputs to all lanes (spatial dimension only), the system broadcasts fuse outputs sequentially over time to different lanes, transforming a spatial resource allocation problem into a temporal one and reducing the number of physical fuses needed
2Adaptability or versatility
If additional undo fuses or XOR fuses are included to invert options associated with blown fuses, then the ability to invert blown fuse options is improved, but the manufacturing cost increases
Solution Approach 1:
The patent enables existing fuse infrastructure to serve multiple lanes through logic sequencing circuitry that broadcasts fuse outputs temporally across multiple lanes. This multi-functional use of existing fuses eliminates the need for additional undo fuses or XOR fuses, reducing manufacturing complexity and cost while maintaining the ability to invert blown fuse options
Solution Approach 2:
The system uses the existing fuse outputs and logic sequencing circuitry to automatically provide inversion capability without requiring separate dedicated inversion circuits for each lane. The logic sequencing circuitry self-manages the distribution and inversion of fuse outputs across lanes, reducing the need for additional manufacturing resources
Data Source
AI summary
Methods, systems, and devices for memory device random option inversion are described. A memory device may use a second set of fuses to selectively invert options associated with a first set of fuses (e.g., blown fuses). The first set of fuses may output a first set of logic states. Option inversion logic circuitry may perform decoding based on a second set of logic states output by the second set of fuses to identify logic states of the second set of logic states that match the first set of logic states. Based on identifying the logic states, the option inversion logic circuitry may select either a logic state of the first set of logic states or an inverted logic state corresponding to the logic state, and store the selected logic state in a latch of the memory device.