Semiconductor Memory Fuse Set Conflict Prevention
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Solution Overview
Problem
Semiconductor memory devices face issues with simultaneous access to redundancy memory cells during normal operations, leading to read failures when repair address information stored in both normal and PPR fuse sets coincides, causing errors due to concurrent access to the same redundancy memory cells.
Innovation Solution
A semiconductor memory device design that includes a first fuse set unit for storing a repair address during a first mode, a second fuse set unit for storing an input address during a second mode, and a comparison unit to reset the first fuse set unit when the repair address matches the input address, preventing simultaneous access by enabling and disabling select signals to control the address transmission between the fuse sets.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If repair address information is stored in both normal fuse set and PPR fuse set, then redundancy repair capability is improved, but simultaneous access to same redundancy memory cells occurs causing read failures
Solution Approach 1:
The patent implements dynamic control of fuse set selection through match signal generation. The comparison unit dynamically determines which fuse set (normal or PPR) should be active based on address matching, allowing the system to adapt between different repair modes while preventing simultaneous access conflicts through conditional enablement of select signals.
Solution Approach 2:
The comparison unit acts as an intermediary between the address input and the fuse set selection. It compares the input address with stored repair addresses and generates match signals that mediate the selection process, ensuring that only one fuse set is activated at a time based on the comparison result, thus preventing simultaneous access conflicts.
2Speed
If PPR operation stores repair address in latch unit during SPPR mode, then repair operation speed is improved, but repair address is lost when power is cutoff
Solution Approach 1:
The patent segments the repair address storage into two distinct parts: a latch unit for temporary high-speed storage during SPPR mode operations, and a PPR fuse set for permanent retention. This segmentation allows the system to enjoy the speed benefits of latch-based storage while ensuring address preservation through fuse-based non-volatile storage.
Solution Approach 2:
The patent performs preliminary action by transferring the repair address from the latch unit to the PPR fuse set before power cutoff occurs. The control logic detects when SPPR mode is active and proactively saves the address information to non-volatile storage, preventing information loss before it happens.
3Reliability
If comparison unit compares input address with repair address, then simultaneous access conflict is detected, but additional circuit complexity is introduced
Solution Approach 1:
The comparison unit serves multiple functions: it compares addresses to detect simultaneous access conflicts, generates match signals for fuse set selection, and enables the control logic to determine which repair mode to activate. This multi-functionality reduces the need for separate detection circuits, thereby limiting the increase in overall circuit complexity.
Solution Approach 2:
The patent merges the conflict detection function with the fuse set selection control. The same comparison unit that determines which fuse set to use also detects potential simultaneous access conflicts. By combining these functions, the patent avoids adding separate detection circuitry, thus minimizing the increase in device complexity.
Data Source
AI summary
A semiconductor memory device may include: a first fuse set unit suitable for storing a first repair address during a first mode; a second fuse set unit suitable for storing an input address during a second mode; and a comparison unit suitable for comparing the input address with the first repair address, wherein the first fuse set unit is reset when the first repair address is the same as the input address.