3D Memory Gate Contact Plug Geometry for Stable Connections

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Solution Overview

Problem

The integration degree of semiconductor devices, particularly in three-dimensional structures, is limited by the design of memory cells, which affects operational reliability and efficiency.

Innovation Solution

A semiconductor device with a gate structure featuring stacked gate lines and contact plugs with taper and inverted taper shapes, combined with a source structure and slit structure, allowing for improved connectivity and stability through alternating material layers and selective etching processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If memory cells are formed as a single layer on a substrate, then manufacturing process is simple, but integration degree reaches a limit

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidintegration degree
Core Design Contradiction:
Ease of manufactureVSQuantity of substance

Solution Approach 1:

The patent transitions from planar single-layer memory cell arrangement to three-dimensional stacked structure, where multiple memory cell layers are vertically stacked on the substrate. This dimensional change enables significantly higher integration density without complicating the fundamental manufacturing process, as the stacking is achieved through sequential formation of multiple layers using similar fabrication steps.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If three-dimensional stacked structure is adopted, then integration degree is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveintegration degreeVSAvoidmanufacturing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The manufacturing process is segmented into modular stages: forming sacrificial structures, creating openings, depositing contact plugs, and repeating the process for multiple stacked layers. Each layer is formed independently through standardized process modules, which reduces overall manufacturing complexity despite the increased number of layers, as the same process sequence is reused iteratively.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Sacrificial contact structures are formed in advance before the final memory cell structure is complete. These sacrificial structures guide the formation of openings and contact plugs, and are subsequently removed to create the desired three-dimensional connectivity. This preliminary action simplifies the overall process by providing a template for subsequent fabrication steps.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If contact plugs with uniform shape are used, then manufacturing is simple, but electrical connection stability is insufficient

Engineering Contradiction:
Improvecontact plug fabrication simplicityVSAvoidelectrical connection stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The contact plug structure is designed with non-uniform geometry, featuring a tapered shape that is narrower at the top and wider at the bottom. This local variation in dimensions optimizes the electrical connection by providing better mechanical interlocking with the gate line and improved adhesion, while the tapered form factor is achieved through controlled etching processes that maintain manufacturing feasibility.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250261409A1Semiconductor device and method of manufacturing semiconductor device
Publication Date: 2025.08.14 SK HYNIX INC
  • US20250261409A1 patent drawing
  • US20250261409A1 patent drawing
  • US20250261409A1 patent drawing

AI summary

A semiconductor device may include a gate structure including stacked gate lines, a first contact plug extending through the gate structure, electrically connected to a first gate line among the gate lines, and including a first portion having a taper shape and a second portion having an inverted taper shape, and a second contact plug extending through the gate structure, electrically connected to a second gate line among the gate lines, and having a taper shape.