3D Memory Gate Contact Structure for Etch Damage Isolation
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Solution Overview
Problem
The manufacturing process of memory devices with increasing stacked layers faces challenges in maintaining performance due to issues such as etching of high-dielectric-constant dielectric layers, leading to gate layer suspension and potential electric leakage between word lines and dummy channel structures.
Innovation Solution
A manufacturing method for semiconductor devices involves forming a protection layer between interlayer sacrificial layers and gate structures, preventing etching damage and electric leakage by using a protection layer and gate structure formation in gate gaps, and forming contact structures connected to gate structures through carefully controlled etching and deposition processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of stacked layers is increased to improve memory capacity, then storage density is improved, but manufacturing difficulty increases and reliability deteriorates due to etching damage and gate layer suspension
Solution Approach 1:
A protection layer is introduced as an intermediary between the etching process and the high-dielectric-constant dielectric layer. This protection layer prevents direct contact between the etchant and the dielectric layer, thereby preventing etching damage and gate layer suspension while allowing the etching process to proceed for forming contact holes in the stacked layers.
Solution Approach 2:
The protection layer is formed in advance before the etching process that creates contact holes. By preparing this protective barrier beforehand, the patent prevents potential damage to the gate structure during subsequent manufacturing steps, ensuring reliability as the number of stacked layers increases.
2Ease of manufacture
If contact holes are formed by etching into remaining interlayer sacrificial layers, then contact structures can be connected to gate structures, but etching damage to high-dielectric-constant dielectric layers occurs causing gate layer suspension
Solution Approach 1:
The protection layer serves as a mediator that allows the etching process to proceed for contact hole formation while preventing the etchant from reaching and damaging the high-dielectric-constant dielectric layer. This enables contact structure formation without compromising gate structure integrity.
Solution Approach 2:
The patent extracts or removes the harmful effect of the etching process by introducing the protection layer that selectively blocks the etchant. The etching process continues for forming contact holes, but the damage pathway to the dielectric layer is extracted or eliminated through the protective barrier.
3Ease of manufacture
If etching is performed to form contact holes through stacked layers, then contact structures can be formed, but electric leakage occurs between word lines and dummy channel structures due to gate structure damage
Solution Approach 1:
The protection layer acts as an intermediary that prevents the etching process from damaging the gate structure. By blocking the etchant from reaching the high-dielectric-constant dielectric layer, it prevents the formation of pathways that would lead to electric leakage between word lines and dummy channel structures.
Solution Approach 2:
The protection layer applies a preliminary anti-action by preventing the harmful etching effect before it can cause damage. This preemptive protective measure stops the potential creation of leakage pathways, ensuring that contact holes can be formed without introducing electric leakage issues.
Data Source
AI summary
A semiconductor device and a manufacturing method thereof, a memory and a memory system are disclosed. The method includes: providing a substrate and stacked layers on the substrate, the stacked layers comprising interlayer sacrificial layers and interlayer insulating layers which are alternately stacked; removing part of the interlayer sacrificial layer to form a gate gap; sequentially forming a protection layer and a gate structure in the gate gap; forming a contact hole extending from a side of the stacked layers facing away from the substrate into a remaining interlayer sacrificial layer and exposing the protection layer; removing the protection layer exposed in the contact hole to expose the gate structure; forming a contact structure in the contact hole in such a way that the contact structure is connected with the gate structure.