Memory Array and Peripheral Gate Stack Sequencing Under Thermal Budget
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Solution Overview
Problem
The formation of memory devices, such as DRAM, is sensitive to thermal budgets, and extreme violations can result in inferior device structures and defective memory devices due to the sequential nature of the processes involved.
Innovation Solution
The proposed solution involves forming gate stacks in the peripheral region after bit line stacks in the memory array region, which improves the thermal budget and enhances the structure quality of the gate stacks, thereby improving the overall performance and reliability of the memory device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If gate stacks are formed before bit line stacks in the memory array region, then the formation process can be completed earlier, but thermal budget violation occurs resulting in inferior device structure
Solution Approach 1:
The patent inverts the conventional formation sequence by forming bit line stacks before gate stacks in the memory array region. This reversal of the process order allows thermal management to be optimized, preventing thermal budget violation while maintaining process efficiency. The inversion resolves the contradiction by prioritizing thermal budget compliance over chronological process completion.
Solution Approach 2:
The patent changes the temporal parameter of the formation process by adjusting the sequence timing. By forming bit line stacks first and gate stacks later, the thermal profile is optimized to prevent excessive temperature accumulation that would violate thermal budget constraints, thereby maintaining manufacturing precision.
2Productivity
If gate stacks in peripheral region are formed earlier, then overall process time is reduced, but thermal damage occurs to the gate stack structures
Solution Approach 1:
The patent segments the formation process into distinct regional sequences: memory array region processes (bit line stack formation) are completed before peripheral region processes (gate stack formation). This segmentation allows thermal management to be optimized for each region independently, preventing thermal damage while maintaining overall productivity.
Solution Approach 2:
The patent performs preliminary action by forming bit line stacks in the memory array region before forming gate stacks in the peripheral region. This preliminary formation establishes a thermal baseline that prevents subsequent thermal damage to gate stacks, ensuring structure quality while maintaining process efficiency.
3Speed
If high temperature processes are applied to form gate stacks early, then formation speed increases, but thermal budget is violated leading to defective devices
Solution Approach 1:
The patent skips the conventional sequence by rushing through bit line stack formation in the memory array region before initiating gate stack formation in the peripheral region. This accelerated sequencing maintains high formation speed while preventing thermal budget violation, ensuring device reliability is not compromised.
Data Source
AI summary
Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes data lines; first structures located in a first region, electrically separated from each other, and including first conductive contacts coupled to the data lines; second conductive contacts located in the first region and coupled to memory elements of the apparatus; second structures located in a second region, electrically separated from each other, and including respective gates of transistors in the second region; a first dielectric material formed in the second region and including a first portion and a second portion, the first portion formed at a first side of a structure among the second structures, the second portion formed at a second side first of the structure; and a second dielectric material formed over the first structures and the second structure. A portion of the second dielectric material contacts the first portion of the first dielectric material.