Memory Device Gate Electrode Step Structure and Contact Insulation

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Solution Overview

Problem

Current semiconductor memory devices face challenges in increasing integration density while maintaining efficient manufacturing processes, particularly in forming reliable contact plugs that avoid electrical connections between gate electrode layers during etching.

Innovation Solution

A memory device design featuring gate electrode layers of varying lengths forming a step structure, with an interlayer insulating layer and contact insulating layers arranged in a zigzag pattern to create recesses and contact plugs, and a method involving alternating layers of sacrificial and insulating materials to form openings and fill them with conductive material, ensuring precise etching and reduced bridge defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If gate electrode layers are formed with varying lengths to increase integration density, then the degree of integration is improved, but the risk of electrical connections (bridge defects) between gate electrode layers during etching increases

Engineering Contradiction:
Improveintegration densityVSAvoiddefect rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A contact insulating layer is introduced as an intermediary between the gate electrode layers and contact plugs. This insulating layer prevents direct electrical connection between adjacent gate electrode layers during etching while still allowing electrical connection through the contact plugs, thus resolving the bridge defect issue while maintaining high integration density

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The contact insulating layer is formed in advance before the contact holes are etched and before the gate electrode layers are processed. This preliminary placement of the insulating layer ensures that bridge defects are prevented from the outset during subsequent etching operations, rather than attempting to fix them later

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If conventional etching processes are used without contact insulating layers, then the manufacturing process is simpler, but electrical connections (bridge defects) occur between gate electrode layers

Engineering Contradiction:
Improveprocess simplicityVSAvoiddefect rate
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The contact insulating layer serves as a mediator that is easily integrated into the existing manufacturing process. It is formed using standard deposition techniques and patterned using conventional photolithography, adding minimal complexity while effectively preventing bridge defects

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The contact insulating layer is segmented into multiple regions (first regions surrounding individual contact plugs and second regions connecting them) that extend in the first direction. This segmentation allows the insulating layer to provide comprehensive protection against bridge defects while maintaining process compatibility

Inventive Principle:
Principle #1Segmentation

3Reliability

If contact insulating layers are added to prevent bridge defects, then reliability is improved, but the device structure becomes more complex

Engineering Contradiction:
Improvedefect rateVSAvoidstructural complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The contact insulating layer performs multiple functions simultaneously: it prevents bridge defects between gate electrode layers, provides electrical insulation, and enables proper electrical connection through contact plugs. This multi-functionality reduces the need for additional separate structures, thereby limiting the increase in device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9853048B2Memory device and method of manufacturing the same
Publication Date: 2017.12.26 SAMSUNG ELECTRONICS CO LTD
  • US9853048B2 patent drawing
  • US9853048B2 patent drawing
  • US9853048B2 patent drawing

AI summary

A memory device includes a plurality of gate electrode layers, an interlayer insulating layer, a plurality of contact plugs, and at least one contact insulating layer. The gate electrode layers extend in a first direction and have different lengths to form a step structure. The interlayer insulating layer is on the gate electrode layers. The contact plugs are connected to the gate electrode layers through the interlayer insulating layer. The at least one contact insulating layer is within the interlayer insulating layer and surrounds one or more of the contact plugs. The at least one contact insulating layer extends in the first direction.