Memory Glitch Detection Using Remote Detectors and Randomized Delay
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Solution Overview
Problem
Existing memory systems are vulnerable to glitch attacks, which can bypass security checks and cause unintended data alteration or access, and current glitch detection methods do not adequately protect against repeated attacks or ensure reliable alarm triggering.
Innovation Solution
Implementing a combination of hardware-based glitch detection and software-based glitch resistance operations, including randomized delay and redundant signaling through remote glitch detectors, to enhance the resilience of memory systems against glitch attacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hardware-based glitch detection is implemented, then glitch detection capability is improved, but device complexity increases
Solution Approach 1:
The patent introduces remote glitch detectors as intermediary components that physically distance the detection function from the vulnerable processing units. These remote detectors monitor for glitch conditions and send notifications to processing units through isolated communication channels, preventing direct compromise while maintaining detection capability. This intermediary approach resolves the contradiction by enabling reliable glitch detection without directly increasing the complexity of the processing units themselves.
Solution Approach 2:
The glitch detection function is segmented into separate remote detectors that are physically and functionally isolated from the processing units. This segmentation allows the detection capability to be improved independently without proportionally increasing the complexity of each processing unit. The system divides the detection task across multiple independent components, reducing the complexity burden on any single element while maintaining overall detection reliability.
2Reliability
If redundant signaling through remote glitch detectors is implemented, then reliability against compromised local processing units is improved, but device complexity increases
Solution Approach 1:
The patent implements preliminary action by having remote glitch detectors continuously monitor for glitch conditions before they can compromise the processing units. The detectors are positioned to detect anomalies in advance and send notification signals proactively. This preliminary detection and notification mechanism ensures that even if local processing units are compromised, the system has already detected and can respond to the glitch condition, improving alarm triggering reliability without requiring complex real-time intervention mechanisms.
3Reliability
If randomized delay operations are implemented, then resistance to repeated glitch attacks is improved, but productivity decreases
Solution Approach 1:
The patent employs periodic action through randomized delay operations that introduce unpredictable time intervals between system operations. This periodic randomization makes it difficult for attackers to time repeated glitch attacks effectively, as the system's state changes at unpredictable moments. The randomized delays are implemented in a way that maintains overall system functionality while adding this protective timing variation, balancing attack resistance with operational productivity.
Data Source
AI summary
A method can include performing at least one glitch resistance operation and detecting, by a circuit included in a glitch detector coupled via a connection matrix to a first processing unit, an indication of a glitch on a memory system. The method can include notifying, via the connection matrix, at least a second processing unit of the detected indication of the glitch. The method can include subsequent to notifying at least the second processing unit, transmitting via the at least the second processing unit a glitch confirmation signal.