Memory Module With Integrated GPU Bypassing Main Processor

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Solution Overview

Problem

Current memory modules lack computation capability, relying solely on processors for data processing, which can lead to bottlenecks in graphics processing and other compute-intensive tasks.

Innovation Solution

A memory module with integrated computation capability, featuring multiple memory chips, a special-purpose controller (such as a GPU or AI accelerator), and an interface device that allows input and output data to bypass the main processor, enabling direct communication with other memory modules.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory modules rely solely on processors for data processing, then the system structure remains simple, but processing bottlenecks occur in graphics processing and other compute-intensive tasks

Engineering Contradiction:
Improveprocessing speedVSAvoidmemory module structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges memory storage functions with computation functions by integrating a special-purpose controller (such as GPU or AI accelerator) directly into the memory module. This allows the memory module to perform computations independently, resolving the bottleneck where all processing must go through the main processor, while maintaining a relatively simple structure by combining functions rather than adding separate components.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If memory modules integrate computation capability, then processing bottlenecks are reduced, but the device complexity increases

Engineering Contradiction:
Improvesystem performanceVSAvoidmemory module architecture
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the computation function from the main processor and places it within the memory module as a dedicated special-purpose controller. This segmentation allows computation tasks to be distributed to the memory module when needed, improving system performance for compute-intensive tasks while keeping the main processor focused on other responsibilities, thereby managing overall system complexity through functional distribution.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The memory module is designed with multi-functionality, serving both as storage media and as a computation unit. The special-purpose controller within the memory module can handle various computation tasks including graphics processing and AI operations, making the memory module a universal component that adapts to different computational needs without requiring separate dedicated hardware for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Loss of time

If input and output data bypass the main processor through direct memory module communication, then processing efficiency improves, but the control structure becomes more complex

Engineering Contradiction:
Improvedata processing timeVSAvoidinterface device configuration
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent introduces an interface device as an intermediary component within the memory module that manages data communication between memory modules. This intermediary handles the complexity of direct memory-to-memory communication, enabling fast data transfer that bypasses the main processor for I/O operations, while the interface device itself manages the control logic, thus reducing the time loss without requiring the main processor to handle complex communication protocols.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250156346A1Memory module with computation capability
Publication Date: 2025.05.15 MICRON TECHNOLOGY INC
  • US20250156346A1 patent drawing
  • US20250156346A1 patent drawing
  • US20250156346A1 patent drawing

AI summary

A memory module having a plurality of memory chips, at least one controller (e.g., a central processing unit or special-purpose controller), and at least one interface device configured to communicate input and output data for the memory module. The input and output data bypasses at least one processor (e.g., a central processing unit) of a computing device in which the memory module is installed. And, the at least one interface device can be configured to communicate the input and output data to at least one other memory module in the computing device. Also, the memory module can be one module in a plurality of memory modules of a memory module system.