Memory Power Supply Compensation for Ground Noise Margins
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor memory devices face issues with ground voltage noise causing a reduction in the margin between internal power supply voltage and internal ground voltage, leading to adverse effects on device operations.
Innovation Solution
Incorporating a ground voltage noise detector and reference voltage generators to detect differences between external and internal ground voltages, generating reference voltages that adjust the internal power supply voltage margins, ensuring consistent electrical characteristics across peripheral circuit regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a large amount of current is used during operation of the semiconductor memory device, then the operational capability is improved, but the ground voltage noise increases causing margin reduction
Solution Approach 1:
The patent segments the ground voltage compensation function into multiple ground voltage noise detectors, each associated with specific internal ground voltage nodes in different peripheral circuit regions. This segmentation allows localized detection and compensation of ground noise in high-current regions without affecting the entire device, enabling high operational capability while managing ground voltage noise through distributed compensation.
Solution Approach 2:
The patent implements feedback mechanisms where ground voltage noise detectors continuously monitor the voltage difference between external ground voltage and internal ground voltage nodes. The detected ground voltage noise is fed back to the reference voltage generator, which adjusts the internal power supply voltage reference accordingly. This closed-loop feedback system dynamically compensates for ground noise effects during high-current operations, maintaining adequate voltage margins while preserving operational capability.
2Power
If the internal power supply voltage driver operates with high current, then the power delivery capability is improved, but the voltage margin between internal power supply voltage and internal ground voltage is reduced
Solution Approach 1:
The patent applies preliminary action by proactively detecting ground voltage noise before it causes critical margin violations. The ground voltage noise detectors continuously monitor internal ground voltage nodes ahead of time, and the reference voltage generator pre-adjusts the internal power supply voltage reference in response to detected noise. This preliminary compensation ensures adequate voltage margins are maintained even during high-current operations, preventing reliability issues before they occur.
Solution Approach 2:
The patent dynamically changes the parameter of the internal power supply voltage reference voltage based on detected ground noise conditions. The reference voltage generator adjusts the reference voltage level in response to ground voltage noise measurements, effectively modulating the voltage margin parameter. This parameter change allows the system to maintain reliable operation with adequate margins during high-power delivery scenarios by adaptively adjusting the reference voltage to compensate for ground noise-induced margin reduction.
3Device complexity
If ground voltage noise is not compensated, then the device complexity is reduced, but the operational reliability deteriorates
Solution Approach 1:
The patent implements self-service by enabling the semiconductor memory device to autonomously detect and compensate for its own ground voltage noise without external intervention. The ground voltage noise detectors, reference voltage generator, and internal power supply voltage driver work together as a self-contained compensation system within the device. This self-service approach maintains operational reliability through automatic ground noise compensation while adding minimal external complexity, as the compensation functionality is integrated within the device itself.
Data Source
AI summary
Provided are a semiconductor memory device and a memory system including the same. The semiconductor memory device includes an external power supply voltage terminal configured to receive an external power supply voltage, an external ground voltage terminal configured to receive an external ground voltage, a ground voltage noise detector configured to detect a difference between the external ground voltage and an internal ground voltage of an internal ground voltage node and generate a ground voltage noise reference voltage, an internal power supply voltage reference voltage generator configured to generate an internal power supply voltage reference voltage based on the external power supply voltage and the ground voltage noise reference voltage, and an internal power supply voltage driver configured to generate an internal power supply voltage based on the internal power supply voltage reference voltage.