3D Nonvolatile Memory Ground Select Transistor Soft-Erase Prevention
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Solution Overview
Problem
Nonvolatile memory devices with a 3D array structure experience reliability degradation due to repeated program/erase operations, as the ground select transistors are often soft-erased, affecting the overall performance and longevity of the memory cells.
Innovation Solution
A nonvolatile memory device with a substrate bias circuit and a ground select line voltage generator that applies an erase voltage to the substrate and a saturation voltage to the ground select line, respectively, with specific timing and voltage profiles to prevent soft-erasing of the ground select transistors, ensuring reliable erase operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If erase operations are performed repeatedly on nonvolatile memory devices with 3D array structure, then data storage function is maintained, but reliability is degraded due to soft-erasing of ground select transistors
Solution Approach 1:
The ground select line voltage generator applies a ground select line saturation voltage to the ground select line before the substrate voltage reaches the erase voltage threshold. This preliminary action prevents holes from accumulating at the ground select transistor during the erase operation, thereby preventing soft-erasing and maintaining transistor integrity over repeated operations
Solution Approach 2:
The invention applies a counteracting voltage (ground select line saturation voltage) to the ground select line in advance to offset the harmful effect of hole accumulation that would otherwise occur during erase operations. This anti-action protects the ground select transistor from degradation
2Reliability
If ground select line saturation voltage is applied during erase operations, then soft-erasing of ground select transistors is prevented, but device complexity increases due to additional voltage generation circuitry
Solution Approach 1:
The ground select line voltage generator performs multiple functions: it generates the ground select line saturation voltage to prevent soft-erasing, and also coordinates with the substrate bias circuit to ensure proper timing of voltage application. This multi-functionality reduces the need for separate dedicated circuits
Data Source
AI summary
A nonvolatile memory device includes: a plurality of cell strings disposed on a substrate, wherein at least one of the plurality of cell strings comprises a plurality of cell transistors and at least one ground select transistor stacked in a direction substantially perpendicular to the substrate, and the substrate and a channel region of the plurality of cell strings have a same conductivity type; a substrate bias circuit configured to provide an erase voltage to the substrate in an erase operation; and a ground select line voltage generator configured to provide a ground select line saturation voltage to the at least one ground select transistor in the erase operation.