Memory Hierarchy Page Migration to Reduce TLB Disruption
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Solution Overview
Problem
Handling page faults and page migrations in computer systems is expensive and disruptive, causing hardware and software overhead, as well as disrupting processor pipelines due to the need for remapping and flushing translation lookaside buffers.
Innovation Solution
A device manages a memory hierarchy by observing access patterns to pages in a first memory and moving non-accessed pages to a second, slower memory, while promoting frequently accessed pages back to the first memory, using a scanner, observer, and promoter threads to optimize memory usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If pages are migrated between memory levels, then memory capacity utilization is improved, but processor performance deteriorates due to pipeline disruption and TLB flushing
Solution Approach 1:
The system performs preliminary actions by monitoring page access patterns and identifying candidate pages for migration before actual memory operations are needed. The scanner thread continuously tracks access bits in page tables to pre-identify pages that should be migrated, allowing the system to proactively manage memory rather than reactively handling page faults.
Solution Approach 2:
The patent introduces an intermediary memory structure (buffer memory or cache) between the first and second memory levels. Pages are moved to this intermediary structure before final migration, allowing for verification of migration safety and reducing the impact on processor performance. The intermediary acts as a buffer that decouples the migration operation from the main memory access path.
2Adaptability or versatility
If page tables are updated to remap pages, then memory organization is optimized, but system overhead increases due to remapping and TLB flush operations
Solution Approach 1:
The system implements self-service through automatic page table update mechanisms. The observer thread monitors page access patterns and automatically triggers migrations when thresholds are exceeded, eliminating the need for manual intervention or complex external control systems. The page migration subsystem serves itself by using its own monitoring data to drive migration decisions.
Solution Approach 2:
The patent employs feedback mechanisms where the scanner thread continuously monitors access bits in page tables and feeds this information back to the migration decision logic. When access patterns indicate a page should be migrated, the feedback loop triggers the migration and subsequent page table updates, creating a closed-loop control system that adapts to changing memory usage patterns.
Data Source
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AI summary
A memory hierarchy includes a first memory and a second memory that is at a lower position in the memory hierarchy than the first memory. A method of managing the memory hierarchy includes: observing, over a first period of time, accesses to pages of the first memory; in response to determining that no page in a first group of pages was accessed during the first period of time, moving each page in the first group of pages from the first memory to the second memory; and in response to determining that the number of pages in other groups of pages of the first memory, which were accessed during the first period of time, is less than a threshold number of pages, moving each page in the other group of pages, that was not accessed during the first period of time from the first memory to the second memory.