Memory System High-Performance Mode for Urgent Data Writes

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Solution Overview

Problem

Memory systems and host systems are not configured for sufficiently quick storage operations during urgent situations, such as vehicle collisions, due to limited storage space and ongoing operations, which can lead to data loss.

Innovation Solution

Implementing a high performance mode in memory systems by provisioning a dedicated logical unit, aborting ongoing operations, and adjusting operational parameters to increase write speed, such as bit rate and clock speeds, to quickly store critical data before power loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If memory systems operate in normal mode with ongoing memory management operations, then data storage capacity is maximized, but write speed is insufficient for urgent situations

Engineering Contradiction:
Improvewrite speedVSAvoiddata storage throughput
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The memory system dynamically switches between normal operation mode and high performance mode based on host commands. In high performance mode, the system aborts ongoing memory management operations (garbage collection, wear leveling) to prioritize rapid data writing, while normally these operations maintain optimal storage capacity and longevity. This dynamic mode switching resolves the contradiction between write speed and storage productivity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The memory system segments operations into two distinct categories: routine memory management operations (garbage collection, wear leveling, bad block management) and urgent data writing operations. By separating these operation types and allowing the host to trigger high performance mode for urgent writes, the system can optimize for speed when needed while maintaining storage productivity during normal operation.

Inventive Principle:
Principle #1Segmentation

2Reliability

If memory systems perform comprehensive memory management operations, then data storage reliability is improved, but processing time increases

Engineering Contradiction:
Improvedata storage reliabilityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The memory system performs memory management operations (garbage collection, wear leveling) as preliminary background tasks during normal operation. When the host issues a high performance mode command, these operations are aborted to prevent them from interfering with urgent data writing. The reliability aspects are maintained through periodic execution of these management operations when not in high performance mode.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically adjusts the execution of memory management operations based on operational mode. During high performance mode, management operations are suspended to minimize processing time for urgent writes. During normal mode, these operations execute to maintain data storage reliability. This dynamic adjustment resolves the contradiction between reliability and processing time.

Inventive Principle:
Principle #15Dynamics

3Quantity of substance

If memory systems allocate space for ongoing operations, then operational flexibility is maintained, but available storage space for urgent data is reduced

Engineering Contradiction:
Improveavailable storage spaceVSAvoidoperational flexibility
Core Design Contradiction:
Quantity of substanceVSAdaptability or versatility

Solution Approach 1:

The system extracts memory management operations (garbage collection, wear leveling) from the critical data writing path by allowing the host to abort these operations when high performance mode is triggered. This ensures that the full available storage space can be dedicated to urgent data writing without being consumed by background management tasks, while still maintaining operational flexibility through periodic execution of these management operations during normal mode.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20250278212A1Techniques for improved write performance modes
Publication Date: 2025.09.04 MICRON TECHNOLOGY INC
  • US20250278212A1 patent drawing
  • US20250278212A1 patent drawing
  • US20250278212A1 patent drawing

AI summary

Methods, systems, and devices for techniques for improved write performance modes are described. A memory system and a host system may support a high performance mode to write data to the memory system. For example, the host system may provision a dedicated logical unit of the memory system. Upon detecting an urgent situation, the host system may transmit a command to the memory system to enter the high performance mode. In response to the command, the memory system may abort ongoing operations, such as internal memory management operations. Additionally, the host system and the memory system may configure operational parameters to increase the speed of write operations, such as a trim set for writing data to the logical unit, a bit rate of data transfer between the host system and the memory system, clock speeds of the memory system, or a combination thereof.