Semiconductor Memory Hole Patterning via Assistance Spacers
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The high cost and complexity of equipment required for forming fine patterns in semiconductor memory devices limit the integration and manufacturing cost-effectiveness of these devices.
Innovation Solution
A method involving the formation of assistance spacers and mask spacers to create specific openings in the etch target layer, allowing for the etching of holes with reduced distances between them, thereby enhancing integration and reducing the need for high-cost lithography equipment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional lithography-based techniques are used to form fine patterns, then manufacturing precision can be achieved, but device complexity and manufacturing cost increase due to high-cost equipment requirements
Solution Approach 1:
The patent introduces assistance spacers and mask spacers as intermediary structures to enable fine pattern formation without requiring high-cost lithography equipment. The assistance spacers are formed first, then mask spacers are deposited on them to create the final fine patterns through selective etching, thus using simple intermediaries to achieve complex patterning results
Solution Approach 2:
The patterning process is segmented into multiple independent steps: forming assistance spacers, depositing mask spacer material, selectively removing portions to create first and second openings, and final etching. This segmentation allows each step to be performed with simpler, lower-cost equipment rather than requiring a single complex lithography step
2Manufacturing precision
If traditional lithography-based techniques are used to form fine patterns, then manufacturing precision can be achieved, but manufacturing cost increases due to high-cost equipment requirements
Solution Approach 1:
The patent uses sacrificial materials (such as organic materials or silicon oxide) that are deposited, used temporarily to define patterns, and then completely removed. These disposable sacrificial layers enable precise pattern formation at low cost by replacing the need for expensive lithography equipment with simple deposition and etching processes
Solution Approach 2:
Mask spacers serve as intermediary structures that are deposited on assistance spacers and then selectively removed to create the final fine patterns. This intermediary approach allows precise pattern definition using low-cost deposition equipment rather than expensive lithography tools
3Productivity
If the distance between holes is reduced to enhance integration, then device integration increases, but manufacturing precision requirements become more stringent
Solution Approach 1:
The assistance spacers are formed in advance with predetermined spacing, and mask spacers are deposited on them before any patterning occurs. This preliminary structuring establishes a precise geometric framework that automatically defines hole positions with high precision, eliminating the need for subsequent high-precision lithography alignment
Solution Approach 2:
The mask spacers self-align to the assistance spacers through conformal deposition, automatically establishing precise relative positioning. The geometry of the assistance spacers themselves serves as the reference for positioning, making the system self-aligning and eliminating the need for external alignment equipment or complex alignment procedures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the formation of semiconductor memory devices with higher integration and lower manufacturing costs by minimizing the distance between holes, overcoming the limitations of traditional lithography-based techniques.
Implementation Method 1
etching the etch target layer exposed by the first openings and the second openings to form holes in the etch target layer
Implementation Method 2
depositing the mask spacer layer to a deposition thickness greater than a half of the shortest distance between a pair of the assistance spacers adjacent to each other in the second direction and a half of the shortest distance between a pair of the assistance spacers adjacent to each other in the third direction
Data Source
AI summary
A method of forming a semiconductor memory device includes forming an etch target layer on a substrate, forming a sacrificial layer having preliminary openings on the etch target layer, forming assistance spacers in the preliminary openings, respectively, removing the sacrificial layer, such that the assistance spacers remain on the etch target layer, forming first mask spacers covering inner sidewalls of the assistance spacers, respectively, the first mask spacers respectively defining first openings, forming a second mask spacer covering outer sidewalls of the assistance spacers, the second mask spacer defining second openings between the first openings, the first and second openings being adjacent to each other along a first direction, and etching the etch target layer exposed by the first openings and the second openings to form holes in the etch target layer.