Memory Image Destaging Prevention for SSD Lifespan

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Solution Overview

Problem

User devices face excessive power consumption and limited SSD erase cycles due to frequent switching between power modes, leading to unnecessary writes and restore cycles that consume SSD erase cycles quickly, especially when screens are turned on and off frequently.

Innovation Solution

Implementing a system that stores memory images in a caching SCM device and prevents them from being destaged to a second nonvolatile SSD during lower power modes, allowing the memory image to be restored directly to DRAM when the device enters full-power mode, thereby reducing write amplification and SSD erase-cycle usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If memory image is destaged to SSD during power-save mode, then power consumption is reduced, but SSD erase cycles are depleted quickly

Engineering Contradiction:
Improvepower consumptionVSAvoidSSD lifespan
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The system performs preliminary actions by checking the destage queue before initiating destage operations. When the queue contains only memory image data (no other dirty data), the system prevents destaging and skips directly to power-save mode, avoiding unnecessary SSD writes that would consume erase cycles

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Instead of the conventional approach of always destaging memory image before entering power-save mode, the patent inverts the logic by preventing destage when it's unnecessary. The system checks whether destage is needed and only performs it when other dirty data exists, otherwise it skips destage and enters power-save mode directly

Inventive Principle:
Principle #13The other way round (Inversion)

2Reliability

If memory image is frequently saved and restored during screen on/off cycles, then data persistence is maintained, but write amplification increases

Engineering Contradiction:
Improvedata persistenceVSAvoidwrite amplification
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The system applies partial action by selectively preventing destage operations based on the contents of the destage queue. When the queue contains only memory image data, destage is completely skipped. This partial prevention strategy reduces write amplification while still maintaining data persistence when actually needed

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system implements feedback by continuously monitoring the destage queue contents and using this information to control destage operations. The queue state (whether it contains memory image data, other dirty data, or both) provides feedback that determines whether to perform or skip destage, creating a closed-loop control system that optimizes SSD write operations

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11880262B2Reducing power consumption by preventing memory image destaging to a nonvolatile memory device
Publication Date: 2024.01.23 RED HAT LLC
  • US11880262B2 patent drawing
  • US11880262B2 patent drawing
  • US11880262B2 patent drawing

AI summary

Power consumption can be reduced by preventing a memory image from being destaged to a nonvolatile memory device. For example, a system can determine, subsequent to a computing device being in a first power mode and having a memory image stored in a first nonvolatile memory device that performs a caching function, that the computing device is in a second power mode that is a higher power mode than the first power mode. The system can, in response to determining that the computing device is in the second power mode, generate a first command to store the memory image in a volatile memory device and prevent the memory image from being stored in a second nonvolatile memory device. The system can, in response to generating the first command, store the memory image in the volatile memory device.