Non-Volatile Memory Addressing via Increment Counter Commands

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Solution Overview

Problem

Conventional protocols are inadequate for quickly updating non-volatile memory modules in devices like imaging and printing devices, which experience increased speed demands and degradation, requiring efficient addressing schemes, command protocols, and electrical interfaces to minimize wait times and electrical connections.

Innovation Solution

The implementation of a method and electrical interface that includes increment counter commands, asynchronous data channels, discrete voltage levels for module addressing, and status signaling to synchronize and update multiple memory modules efficiently, reducing the number of electrical connections and enhancing reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional protocols are used to update non-volatile memory modules, then the system is simple to implement, but the update speed is too slow to keep up with faster page rates

Engineering Contradiction:
Improvememory update speedVSAvoidprotocol complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The protocol is segmented into distinct phases: a setup phase where the host configures memory modules with addresses and parameters, followed by a execution phase where increment commands are issued. This segmentation allows the system to achieve high-speed updates while maintaining manageable complexity by separating configuration from operation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Memory modules are pre-configured with their addresses, increment values, and operational parameters before the actual counting process begins. This preliminary action eliminates the need for complex real-time configuration during high-speed operation, enabling fast page rates to be maintained without proportionally increasing protocol complexity.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If multiple non-volatile memory modules are used to record usage counts, then more usage data can be tracked, but the wait time for updating all modules increases

Engineering Contradiction:
Improveusage tracking capabilityVSAvoidmemory update wait time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

Multiple memory modules are merged into a single coordinated system where all modules receive the same increment command simultaneously. The host issues one unified command that triggers parallel increment operations across all configured memory modules, allowing comprehensive usage tracking without sequential update delays.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system maintains continuous operation by allowing memory modules to be configured once and then operate autonomously in the background. The host can continuously issue increment commands without waiting for each individual module to complete its update, as all modules process commands in parallel, eliminating cumulative wait times.

Inventive Principle:
Principle #20Continuity of useful action

3Loss of information

If many electrical connections are used between the processing device and memory modules, then more data can be transmitted, but the cost and complexity of removable components increases

Engineering Contradiction:
Improvedata transmission capabilityVSAvoidelectrical connection count
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

A single electrical connection serves multiple functions: it transmits addresses to identify which memory module is being addressed, carries increment commands to update counters, and provides status feedback from the memory modules to the host. This multi-functional connection eliminates the need for separate dedicated lines for each function, reducing the total connection count while maintaining full data transmission capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system transitions from using multiple separate connections for different functions to using a single connection that operates across multiple dimensions of communication. By encoding addresses, commands, and status information in different temporal or logical dimensions within the same physical connection, the system achieves comprehensive data transmission with minimal physical connections.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Speed

If non-volatile memory modules operate at higher speeds to match faster page rates, then device performance improves, but error degradation becomes more frequent

Engineering Contradiction:
Improvepage rateVSAvoidmemory operation reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

Each memory module autonomously handles its own increment operation and error checking. When an increment command is received, the module independently updates its counter, verifies the operation, and generates status feedback without requiring continuous host intervention. This self-service capability allows high-speed operation while maintaining reliability through distributed error handling.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system implements a feedback mechanism where memory modules continuously report their status and any errors to the host through the electrical connection. This real-time feedback allows the host to detect and handle errors promptly, maintaining high reliability even at high page rates where errors are more likely to occur.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS7844786B2Addressing and command protocols for non-volatile memories utilized in recording usage counts
Publication Date: 2010.11.30 LEXMARK INTERNATIONAL INC
  • US7844786B2 patent drawing
  • US7844786B2 patent drawing
  • US7844786B2 patent drawing

AI summary

Electrical interfaces, addressing schemes, and command protocols allow for communications with memory modules in computing devices such as imaging and printing devices. Memory modules may be assigned an address through a set of discrete voltages. One, multiple, or all of the memory modules may be addressed with a single command, which may be an increment counter command, a write command, or a punch out bit field. The status of the memory modules may be determined by sampling a single signal that may be at a low, high, or intermediate voltage level.