Multi-Core Memory Power Management via Independent Voltage Regulators

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Solution Overview

Problem

Power management in multi-core memory systems poses a challenge due to the need for independent voltage regulation for each core, which is difficult to achieve efficiently, especially when the memory units are fabricated on separate chips, leading to increased complexity and cost.

Innovation Solution

A power management device and method that includes a controller to independently enable or disable voltage regulators for each memory unit, using a third voltage regulator to provide a reference voltage and transform external control instructions into control signals, allowing for efficient power management across multiple memory units fabricated on a single chip.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If independent voltage regulation is implemented for each memory unit, then power management efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvepower management efficiencyVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory device is divided into multiple independent memory units (first memory unit and second memory unit), each with its own voltage regulator. This segmentation allows independent power management for each unit, improving power management efficiency while the modular structure helps control overall device complexity through standardized replication of functional blocks.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The controller serves multiple functions: it controls the enable/disable states of both voltage regulators, generates control signals from external control instructions, and manages power distribution across different memory units. This multi-functionality reduces the need for separate control circuits, thereby managing device complexity while maintaining power management efficiency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of manufacture

If separate chip fabrication is used for memory units, then manufacturing flexibility is improved, but cost and complexity increase

Engineering Contradiction:
Improvemanufacturing flexibilityVSAvoidcomplexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

Multiple memory units are integrated on a single chip substrate, combining what could be separate chip fabrications into one unified structure. This merging reduces the number of separate manufacturing processes, lowers overall complexity, and reduces cost while maintaining the flexibility to independently control each memory unit through the controller and voltage regulators.

Inventive Principle:
Principle #5Merging (Combining)

3Volume of moving object

If multiple voltage regulators are integrated on a single chip, then device miniaturization is achieved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvedevice volumeVSAvoidmanufacturing precision
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

The voltage regulators and controller are integrated within the same chip substrate structure, with the controller positioned to manage both regulators. This nested integration of control and regulation functions within a unified chip architecture achieves device miniaturization while the standardized design of the regulator modules helps manage manufacturing precision requirements through replication of proven designs.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS9256278B2Devices and methods for multi-core memory
Publication Date: 2016.02.09 WINBOND ELECTRONICS CORP
  • US9256278B2 patent drawing
  • US9256278B2 patent drawing
  • US9256278B2 patent drawing

AI summary

A power management device is adopted in a memory device which includes a first memory unit and a second memory unit, including a first voltage regulator, a second voltage regulator, and a controller. The first voltage regulator receives a supply voltage from an external supply source and provides a first internal voltage to the first memory unit. The second voltage regulator receives the supply voltage from the external supply source and provides a second internal voltage to the second memory unit. The controller independently enables or disables the first voltage regulator and the second voltage regulator according to a control signal.