Memory Initialization Circuit for Serial Bus Reliability
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Solution Overview
Problem
Existing memory control devices accessible via serial buses, such as SPI or I2C, face issues with incomplete initialization, leading to unreliable operation due to inhibited states caused by voltage disturbances or memory cell failures, necessitating power cutoffs to restore functionality, which is undesirable in applications like motor cars.
Innovation Solution
A control device with an initialization circuit that detects specific events, such as initialization commands or changes in selection signals, to partially initialize the main and write state machines without power cutoffs, ensuring compatibility with communication protocols and maintaining memory functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the control device is completely initialized by switching off the circuit, then the memory reliability is improved, but the loss of time increases and productivity decreases
Solution Approach 1:
The patent applies preliminary action by performing a partial initialization of the control device at the end of each write command sequence, before the memory is deselected. This preliminary initialization prepares the state machines (MFSM and WFSM) in advance, so that if a disturbance occurs, the memory is already in a known good state and does not require a full reinitialization upon power cycling. The detector circuit continuously monitors and updates the initialization status, ensuring the device is always in a defined state without requiring complete power-off initialization.
2Loss of time
If the control device is partially initialized during operation, then the loss of time is reduced, but the reliability may worsen due to incomplete initialization
Solution Approach 1:
The patent applies partial action by selectively initializing only the necessary components of the control device during operation. The detector circuit determines which parts of the control device need initialization based on the current operational state. After a write command, the patent performs partial initialization of the state machines without completely resetting all control device functions, thus saving time while maintaining sufficient reliability for continued operation. This partial initialization is excessive enough to handle most disturbances but not so complete as to cause full initialization delays.
Solution Approach 2:
The patent implements feedback through the detector circuit that continuously monitors the initialization status of the control device and provides feedback signals to the state machines. The detector circuit detects whether the control device is properly initialized and adjusts subsequent operations accordingly. This feedback mechanism ensures that partial initialization is performed only when necessary, maintaining reliability by detecting and responding to initialization status changes in real-time without requiring complete reinitialization.
3Manufacturing precision
If the state machine WFSM is blocked during write operations, then the manufacturing precision is improved by preventing errors, but the productivity decreases due to blocked operation
Solution Approach 1:
The patent applies dynamics by making the blocking of the WFSM state machine conditional and time-limited rather than static and permanent. The WFSM is blocked only during the specific write operation when data is being programmed to the memory array, and the blocking is automatically released after the write command completes. The detector circuit monitors the write operation status and dynamically adjusts the blocking state. This dynamic approach ensures precision during critical write operations while restoring full productivity immediately after writes complete, unlike permanent blocking which would continuously reduce productivity.
Data Source
AI summary
A method for initializing a control device of a memory, the control device executing commands for accessing the memory transmitted to the memory by a control signal, the method comprising steps of detecting the switching on of the memory and of at least partially initializing the control device following the switching on of the memory. According to one embodiment of the present invention, the method comprises steps of detecting a specific event in the control signal, and of at least partially initializing the control device following the detection of the specific event.