Memory Input Protection Circuit for RDL-Induced CDM Noise
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Solution Overview
Problem
The Charge Device Model (CDM) noise caused by parasitic capacitance between Redistribution Layers (RDL) and metal wiring in stacked memory devices can lead to breakdown of transistor gate insulating films, affecting the operation of semiconductor devices.
Innovation Solution
Incorporating protection circuits, such as electrostatic discharge (ESD) circuits with P-type and N-type transistors, directly coupled to the input of buffer circuits to discharge accumulated charges from the RDL layer, thereby protecting the gate insulating film.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If RDL layers are used to connect pads of multiple stacked chips, then memory density is improved, but parasitic capacitance between RDL and metal wiring increases causing CDM noise that can break transistor gate insulating films
Solution Approach 1:
The patent introduces a protection circuit as an intermediary element between the RDL layer and the transistor gate. This protection circuit includes a first transistor whose gate is capacitively coupled to the RDL layer and whose drain is coupled to the transistor gate. The protection circuit acts as a mediator that absorbs and dissipates the CDM noise energy before it can reach and damage the transistor gate insulating film, thus resolving the contradiction between achieving high memory density through RDL stacking and preventing CDM noise damage.
2Reliability
If protection circuits are added to discharge accumulated charges, then transistor gate insulating film is protected, but device complexity increases
Solution Approach 1:
The patent merges the protection circuit functionality with the existing buffer circuit structure. The protection circuit shares common elements such as the second transistor with the buffer circuit, and the output of the protection circuit is directly coupled to the input of the buffer circuit. This integration approach allows the protection function to be added while minimizing the increase in overall device complexity, as the protection circuit reuses existing transistors and wiring rather than adding completely separate protection structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The protection circuits effectively reduce noise-induced damage to the transistor gate insulating films, ensuring stable operation of semiconductor devices by discharging accumulated charges before they cause harm.
Implementation Method 1
Incorporating protection circuits, such as electrostatic discharge (ESD) circuits with P-type and N-type transistors, directly coupled to the input of buffer circuits to discharge accumulated charges from the RDL layer
Implementation Method 2
the charge device model (CDM) may occur in the form of a parasitic capacitance between the RDL and a metal wiring
Data Source
AI summary
A semiconductor device may include a multi-level wiring structure comprising a first-level wiring layer, a second-level wiring layer and an insulating layer between the first-level wiring layer and the second-level wiring layer. The device may also include a bond pad, a first wiring extending from the bond pad, and a second wiring overlapping at least in part with the first wiring through the insulating layer to be capacitively coupled to the first wiring. The first wiring and the second wiring may each be formed respectively as the first-level wiring layer and the second-level wiring layer. The device may also include a protection circuit configured to be DC coupled to the second wiring. The first-level wiring layer may include a redistribution layer (RDL).