Memory Instruction Merging for Lower Data Access Overhead
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Solution Overview
Problem
Existing memory systems based on the JEDEC protocol require processing instructions one by one, leading to increased instruction overhead and reduced efficiency in electronic devices, particularly affecting performance in mobile terminals.
Innovation Solution
A data access method that merges multiple instructions to be processed into a single merged instruction, allowing concurrent processing by the memory, thereby reducing instruction overhead and improving system IO performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple instructions are processed sequentially one by one, then the memory system can process each instruction accurately, but the instruction overhead increases and processing efficiency decreases
Solution Approach 1:
The patent merges multiple individual instructions into a single compound instruction that contains multiple address operands. This allows the memory system to process multiple address accesses in one instruction cycle rather than sequentially processing each instruction separately, thereby reducing instruction overhead and improving processing efficiency.
2Productivity
If the memory system processes instructions concurrently, then processing efficiency improves, but the complexity of instruction management increases
Solution Approach 1:
The patent segments the instruction merging process into distinct functional modules: an instruction acquisition module that collects individual instructions, an instruction merging module that combines compatible instructions into compound instructions, and an instruction sending module that transmits them to the memory system. This modular approach manages complexity while enabling concurrent processing.
3Loss of time
If instructions with non-consecutive addresses are merged into a single instruction, then instruction overhead is reduced, but the complexity of address mapping increases
Solution Approach 1:
The patent introduces an instruction merging module as an intermediary between the instruction source and the memory system. This module handles the complex address mapping and instruction combination logic, shielding the rest of the system from complexity while enabling reduced instruction overhead through merged instructions with multiple address operands.
Data Source
AI summary
Provided in the present disclosure are a data access method and apparatus, and a non-transient computer-readable storage medium. The method includes: acquiring a plurality of instructions to be processed, wherein each of the instructions to be processed includes an address to be accessed; determining instructions to be merged from among the plurality of instructions to be processed, and performing merging processing on the instructions to be merged, so as to obtain a merged instruction; and performing data access according to an address to be accessed corresponding to the merged instruction.