Nonvolatile Memory Control Gate Insulating Layer Thickness Uniformity
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Solution Overview
Problem
Conventional nonvolatile memory devices with control gate insulating layers formed by thermal oxidation exhibit non-uniform thickness, leading to early breakdown and malfunction during data programming or erasing due to thinner regions, affecting electrical performance and device reliability.
Innovation Solution
A method for fabricating a nonvolatile memory device with a uniform control gate insulating layer, involving the formation of a trench structure with a thinner insulating layer on the sidewalls and a thicker layer on the bottom, using high-density plasma chemical vapor deposition (HDP CVD) to achieve a more uniform thickness distribution, and a control gate is formed on top of this insulating layer structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If thermal oxidation process is used to form control gate insulating layer, then the process is simple and easy to manufacture, but the insulating layer has non-uniform thickness leading to early breakdown and malfunction
Solution Approach 1:
The patent changes the deposition parameters by using HDP CVD process with specific conditions (pressure, temperature, gas flow ratios) to achieve uniform insulating layer thickness. The process parameters are optimized to ensure that the deposition rate is consistent across different regions of the substrate, eliminating the non-uniformity problem of thermal oxidation.
Solution Approach 2:
The patent forms a composite insulating layer structure with multiple layers (first insulating layer 208, second insulating layer 210, third insulating layer 212) with different materials and thicknesses. This composite structure compensates for the non-uniformity by having the thicker third layer on sidewalls and appropriate thickness on bottom, creating an overall uniform effective thickness for reliable device operation.
2Reliability
If thermal oxidation process is used to form control gate insulating layer, then the process is simple, but the insulating layer thickness is non-uniform causing early breakdown
Solution Approach 1:
The patent changes the deposition parameters by using HDP CVD process with specific conditions (pressure, temperature, gas flow ratios) to achieve uniform insulating layer thickness. The process parameters are optimized to ensure that the deposition rate is consistent across different regions of the substrate, eliminating the non-uniformity problem of thermal oxidation.
Solution Approach 2:
The patent performs preliminary actions by forming multiple insulating layers with specific thicknesses before forming the control gate. The first, second, and third insulating layers are deposited with controlled thicknesses to pre-compensate for any potential non-uniformity, ensuring that the final control gate insulating structure has uniform effective thickness throughout.
3Reliability
If thicker insulating layer is formed on central portion, then breakdown is prevented in center, but thinner marginal regions cause early breakdown and malfunction
Solution Approach 1:
The patent applies local quality by forming the third insulating layer with different thicknesses in different locations: thicker on sidewalls and controlled thickness on bottom. This localized thickness distribution ensures that all regions (central and marginal) have sufficient breakdown resistance, with the third layer providing extra thickness on sidewalls where field effects are more pronounced.
Solution Approach 2:
The patent changes the deposition parameters by using HDP CVD process with specific conditions (pressure, temperature, gas flow ratios) to achieve uniform insulating layer thickness. The process parameters are optimized to ensure that the deposition rate is consistent across different regions of the substrate, eliminating the non-uniformity problem of thermal oxidation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach results in a more reliable and efficient nonvolatile memory device with improved electrical performance by preventing malfunctions associated with non-uniform control gate insulating layer thickness, enhancing the overall reliability and functionality of the device.
Implementation Method 1
using high-density plasma chemical vapor deposition (HDP CVD) to achieve a more uniform thickness distribution
Data Source
AI summary
A nonvolatile memory device and method for fabricating the same are provided. The method for fabricating the nonvolatile memory device comprises providing a substrate. A tunnel insulating layer and a first conductive layer are formed in the substrate. A trench is formed through the first conductive layer and the tunnel insulating layer, wherein a portion of the substrate is exposed from the trench. A first insulating layer is formed in the trench. A second insulating layer is formed on sidewalls of the first insulating layer. A third insulating layer is conformably formed in the trench, covering the first insulating layer on a bottom portion of the trench and the second insulating layer on the sidewalls of the trench, wherein thickness of the third insulating layer on the sidewalls is thinner than that on the bottom of the trench. A control gate is formed on the third insulating layer in the trench.