Non-Volatile Memory Inter-Electrode Insulation Structure
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Solution Overview
Problem
Current non-volatile semiconductor memory devices face challenges in effectively insulating electric charges between the floating gate and control gate electrodes, leading to leakage and reduced memory retention due to the limitations of existing inter-electrode insulation films.
Innovation Solution
The implementation of a multi-layer inter-electrode insulation film structure, including electric charge accumulation layers and boundary insulation films, with specific materials and thicknesses to create deeper potential wells and barriers, enhancing charge confinement and reducing leakage to the control gate electrode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single-layer inter-electrode insulation film is used, then the device structure is simple, but charge leakage occurs and memory retention is reduced
Solution Approach 1:
The inter-electrode insulation film is divided into multiple layers with different functions: a first insulation film layer containing charge accumulation layers for storing electric charges, and a second insulation film layer providing additional insulation. This segmentation allows each layer to perform its specific function optimally, preventing charge leakage while maintaining reliable memory retention.
Solution Approach 2:
The insulation film structure combines different materials with complementary properties: the first insulation film uses materials with high dielectric constants for charge accumulation, while the second insulation film uses materials providing strong insulation barriers. This composite structure achieves superior charge confinement and memory retention compared to single-material films.
2Reliability
If the insulation film thickness is increased, then charge leakage is reduced, but the memory cell size increases
Solution Approach 1:
Different regions of the insulation film structure have different thicknesses and material properties optimized for their specific functions. The charge accumulation layers have specific thicknesses for optimal charge storage, while the insulation layers have thicknesses optimized for charge confinement. This local optimization achieves effective charge confinement without uniformly increasing the overall memory cell volume.
Solution Approach 2:
The multi-layer composite structure achieves superior charge confinement with reduced total thickness compared to a single thick insulation layer. The combination of high-k dielectric materials for charge accumulation and insulation materials for charge confinement creates deeper potential wells and barriers, effectively preventing charge leakage while maintaining compact memory cell dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the retention of electric charges by confining them within potential wells and barriers, reducing leakage and enhancing the memory cell's holding properties, thereby improving the overall performance of the non-volatile semiconductor memory device.
Implementation Method 1
The lower insulation film includes N (N is an integer of 2 or larger) electric charge accumulation layers and boundary insulation films provided between the electric charge accumulation layers
Data Source
AI summary
According to one embodiment, a non-volatile semiconductor memory device includes: a tunnel insulation film provided on a semiconductor substrate; a floating gate electrode provided on the tunnel insulation film; an inter-electrode insulation film provided on the floating gate electrode; and a control gate electrode provided on the inter-electrode insulation film. The inter-electrode insulation film includes: a lower insulation film provided on the floating gate electrode side; and an upper insulation film provided on the control gate electrode side. The lower insulation film includes: N (N is an integer of 2 or larger) electric charge accumulation layers; and boundary insulation films provided between the electric charge accumulation layers.