Memory Device Insulator Tapering for Void Prevention
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Solution Overview
Problem
Existing manufacturing methods for memory devices with magnetoresistive effect elements face challenges in achieving a high integration density and preventing void formation between layer stacks, which can degrade device performance due to insufficient insulator thickness and the use of high-density plasma chemical vapor deposition (HDP-CVD) that unintentionally etches the layer stacks.
Innovation Solution
The method involves forming a first and second layer stack with a specific insulator structure, where the insulator's side wall tops are partially thinned using an ion beam, creating a shadow effect to maintain the bottom insulator thickness while tapering the side walls, thereby reducing the aspect ratio of inter-layer-stack areas and facilitating effective filling with a second insulator without using HDP-CVD.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high-density plasma chemical vapor deposition (HDP-CVD) is used to fill insulator between layer stacks, then filling efficiency is improved, but the layer stacks are unintentionally etched
Solution Approach 1:
The patent extracts and removes the problematic top portions of the insulator using ion beam processing before performing CVD filling. This preliminary removal of excess insulator material prevents the HDP-CVD process from causing unintended etching of the layer stacks, while still allowing efficient filling of the remaining inter-layer-stack areas.
Solution Approach 2:
The patent performs preliminary thinning of the insulator's top portions using ion beam processing before the CVD filling step. This preliminary action modifies the insulator structure in advance to prevent harmful interactions during the subsequent HDP-CVD process, eliminating the need to use HDP-CVD at all.
2Volume of moving object
If insulator thickness is reduced to achieve high integration density, then device size is reduced, but void formation occurs between layer stacks
Solution Approach 1:
The patent applies different thickness characteristics to different parts of the insulator: the bottom portions maintain sufficient thickness to prevent void formation and ensure reliability, while the top portions are thinned to reduce overall device size and enable high integration density. This local differentiation of insulator thickness resolves the contradiction between miniaturization and void prevention.
3Ease of manufacture
If conventional CVD is used to form insulator, then process simplicity is maintained, but void formation occurs due to insufficient filling
Solution Approach 1:
The patent performs preliminary thinning of the insulator top portions using ion beam processing before CVD filling. This creates a modified insulator structure with reduced aspect ratio in the inter-layer-stack areas, enabling conventional CVD to effectively fill the spaces without void formation, thus maintaining process simplicity while improving filling completeness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances memory device integration density and performance by preventing void formation and maintaining the integrity of the layer stacks, allowing for efficient filling of insulators between the layers without unintended etching, thus improving the overall structure and functionality of the memory device.
Implementation Method 1
Part of the first portion of the first insulator and part of the second portion are thinned with an ion beam while leaving the third portion of the first insulator
Data Source
AI summary
According to one embodiment, a method of manufacturing a memory device includes forming a first layer stack and a second layer stack at an interval on a foundation, and forming a first insulator that includes a first portion on a side surface of the first layer stack, a second portion on a side surface of the second layer stack, and a third portion on the foundation between the first and second layer stacks. Part of the first portion of the first insulator and part of the second portion are thinned with an ion beam while leaving the third portion of the first insulator. A second insulator is formed between the first and second portions of the first insulator.