Memory Device Intensive Row Detection Refresh Circuit
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor devices are scaled down, the narrower space between word-lines leads to increased disturbance phenomena, causing charge loss in memory cells due to voltage distribution from adjacent word-lines, especially during intensive access, which existing technologies fail to mitigate effectively.
Innovation Solution
A memory device incorporating an intensively accessed row detection circuit and a refresh control circuit that identifies intensively accessed memory cell rows based on accumulated access time and preferentially refreshes neighboring rows to minimize data loss, using a combination of latch, pulse generation, and row address profiler circuits to generate and adjust refresh signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the fabrication process is scaled down to increase integration density, then the memory capacity is improved, but the disturbance phenomenon increases causing higher data loss rate
Solution Approach 1:
The patent applies local quality by differentiating refresh operations into standard refresh and intensive refresh based on local access patterns. The system identifies specific memory cell rows that experience intensive access and applies targeted refresh operations to those localized areas, rather than uniformly refreshing all rows. This resolves the contradiction by maintaining high reliability in disturbed regions while preserving the high capacity benefits of scaling.
Solution Approach 2:
The patent implements preliminary action through the intensive accessed row detection circuit that proactively identifies rows subject to disturbance before data loss occurs. By detecting intensive access patterns and pre-refreshing affected rows, the system prevents data loss rather than reacting after it occurs. This allows the memory to maintain higher capacity through scaling while proactively mitigating reliability issues.
2Volume of moving object
If the space between word-lines is reduced to increase density, then the integration is improved, but the disturbance phenomenon occurs more frequently causing charge loss
Solution Approach 1:
The system applies local quality by identifying specific word-line regions experiencing intensive access and applying targeted refresh operations to those localized areas. The intensive accessed row detection circuit monitors access patterns and triggers refresh operations only for affected rows, rather than uniformly refreshing the entire memory array. This resolves the contradiction by maintaining high integration density while locally mitigating disturbance effects in affected regions.
Solution Approach 2:
The patent implements feedback through the intensive accessed row detection circuit that continuously monitors access patterns and provides information to the refresh control circuit. This feedback mechanism allows the system to adaptively identify rows experiencing disturbance due to intensive access and apply corrective refresh operations. The feedback loop enables the memory to maintain high density while dynamically responding to and mitigating disturbance phenomena.
3Speed
If intensive access to a particular word-line occurs, then the access speed is improved, but the charge loss in neighboring memory cells increases
Solution Approach 1:
The patent applies preliminary action by proactively identifying rows that are or will be subject to intensive access through the detection circuit, and performing refresh operations before data loss occurs. The system monitors access patterns and pre-refreshes rows that are likely to experience disturbance from upcoming intensive operations, thereby maintaining both high access speed and charge retention reliability.
Solution Approach 2:
The system implements preliminary anti-action by applying refresh operations to neighboring rows before they suffer charge loss from intensive access to adjacent word-lines. The detection circuit identifies intensive access patterns and triggers refresh operations on affected rows in advance, counteracting the disturbance effect before it causes data loss. This allows intensive access operations to proceed at high speed while pre-emptively protecting against charge loss.
Data Source
AI summary
A memory device includes a memory cell array, an intensively accessed row detection circuit, and a refresh control circuit. The memory cell array includes a plurality of memory cell rows. The intensively accessed row detection circuit generates an intensively accessed row address indicating an intensively accessed memory cell row among the plurality of memory cell rows based on an accumulated access time for each of the plurality of memory cell rows. The refresh control unit preferentially refreshes neighboring memory cell rows adjacent to the intensively accessed memory cell row indicated by the intensively accessed row address when receiving the intensively accessed row address from the intensively accessed row detection unit. The memory device effectively reduces a rate of data loss.