Semiconductor Memory Device Inter-Cell Interference Control

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Solution Overview

Problem

The miniaturization of nonvolatile memory devices leads to increased inter-cell interference effects, causing the threshold voltage distribution of memory cells to spread, which complicates the achievement of narrow threshold voltage ranges required for multi-valued memory cells like MLCs.

Innovation Solution

A semiconductor memory device with a specific write sequence that includes a write loop with a verify operation, where the reference voltage is adjusted based on data written to adjacent memory cells, using multiple verify levels to manage the threshold voltage distribution and minimize inter-cell interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If memory device is miniaturized, then device size is reduced and integration density is improved, but inter-cell interference effect increases causing threshold voltage distribution to spread

Engineering Contradiction:
Improvedevice sizeVSAvoidthreshold voltage distribution
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by performing a verify operation before the write operation is completed. The controller determines whether to end the write operation based on the verify result, which detects inter-cell interference before it fully affects the threshold voltage distribution. This preliminary detection allows the system to adjust the write voltage or terminate the write operation to prevent excessive threshold voltage spreading.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by using the verify operation to detect the state of the memory cell during the write process. The verify result is fed back to the controller, which then decides whether to continue or end the write operation. This feedback mechanism allows dynamic adjustment of the write process to compensate for inter-cell interference effects in miniaturized devices.

Inventive Principle:
Principle #23Feedback

2Reliability

If write voltage is increased to ensure data writing, then writing reliability is improved, but threshold voltage distribution spreads due to inter-cell interference

Engineering Contradiction:
Improvewriting reliabilityVSAvoidthreshold voltage distribution
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies dynamics by making the write operation duration and voltage application dynamic rather than fixed. The controller adjusts the write operation based on real-time verify results, extending or terminating the write voltage application as needed. This dynamic control ensures reliable writing while preventing excessive threshold voltage spreading caused by prolonged high-voltage application.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes parameters by adjusting the write voltage magnitude and duration based on verify results. When inter-cell interference is detected, the controller modifies the write parameters (voltage level, pulse width) to balance writing reliability with threshold voltage distribution control. This parameter adaptation allows the system to handle varying interference conditions in miniaturized devices.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If verify operation is added to detect inter-cell interference, then threshold voltage distribution control is improved, but write time increases

Engineering Contradiction:
Improvethreshold voltage distributionVSAvoidwrite time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent applies partial action by performing a simplified verify operation that checks only the critical threshold voltage range affected by inter-cell interference. Rather than a full read-verify cycle, the system performs a targeted check that suffices to detect interference effects. This partial verification reduces the time penalty while still providing the necessary control over threshold voltage distribution.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20170263326A1Semiconductor memory device
Publication Date: 2017.09.14 KIOXIA CORP
  • US20170263326A1 patent drawing
  • US20170263326A1 patent drawing
  • US20170263326A1 patent drawing

AI summary

A memory device capable of narrowing the threshold voltage distribution thereof includes word lines, bit lines, memory cells, a word line driver configured to apply voltage to a selected word line, a sense amplifier circuit configured to detect data of the memory cell, and a controller configured to control the word line driver and the sense amplifier. A write sequence includes a write operation in which write voltage is applied to the selected word line by the word line driver, and a verify operation in which, when a threshold voltage of the selected memory cell reaches a reference voltage, writing to the selected memory cell is completed. Based on second data that is written later than the first data to an adjacent memory cell adjacent to the selected memory cell, the controller changes the reference voltage used for completing the writing to the selected memory cell.