Configurable Memory Interconnect for Hot-Swap Fault Tolerance
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Solution Overview
Problem
Existing memory system architectures face challenges in providing flexible and cost-effective upgrade capabilities while maintaining high bandwidth, low power consumption, and low memory latency, especially in data centers where data integrity and rapid retrieval are critical, and they often require operational disruptions for memory expansion.
Innovation Solution
A memory system with a motherboard featuring a plurality of connectors and point-to-point bus segments, where each connector is connected to multiple bus segments, and a memory controller that can maintain connectivity with memory modules even when some modules are removed or faulty, using configurable switches to route signals between bus segments and memory circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If memory modules are removed or replaced in traditional memory systems, then memory capacity or performance can be upgraded, but system operation is disrupted and connectivity is lost
Solution Approach 1:
The memory system is divided into multiple independent point-to-point bus segments, where each connector is connected to two or more bus segments. This segmentation allows the system to maintain connectivity through alternative paths when a memory module is removed or replaced, as the bus segments can be dynamically reconfigured to bypass failed or upgraded modules without disrupting overall system operation.
Solution Approach 2:
The system employs configurable switches within memory modules that can dynamically change their routing state. When a memory module is removed or upgraded, the switches in adjacent modules can be reconfigured to redirect signals through alternative bus segments, enabling the system to adapt its connectivity topology in real-time and maintain continuous operation during memory upgrades.
2Reliability
If data bus architecture provides continuous connectivity, then system reliability is improved, but flexibility for memory module removal and replacement is reduced
Solution Approach 1:
Configurable switches act as intermediaries between memory modules and the data bus architecture. These switches can dynamically alter the bus topology by routing signals through different paths. When a memory module needs to be replaced, the switches redirect the data flow through alternative bus segments, maintaining continuous connectivity while enabling module replacement without requiring system shutdown or bus reconfiguration.
3Adaptability or versatility
If memory system is configured with empty sockets for future expansion, then upgrade path is provided, but system complexity and potential failure points increase
Solution Approach 1:
The point-to-point bus segments and configurable switches are designed with universal functionality that supports both current memory modules and future expansion modules. The same bus infrastructure and switching mechanism handle both populated and unpopulated sockets uniformly, eliminating the need for different connection architectures. This universal design allows empty sockets to be seamlessly integrated into the existing connectivity framework without adding complex routing logic or separate bus structures.
Data Source
AI summary
An interconnection system, apparatus and method is described where the motherboard may be populated with less than all of the modules that it has been designed to accept while maintaining a configuration such that in the event of a module failure, a memory controller failure, or a combination thereof, the connectivity of the remaining modules is maintained. Where data is stored using a RAID organization of the memory on the modules, the data may be reconstructed to a spare module. The system also provides for the orderly incremental expansion of the memory by adding additional memory modules and memory controllers, while maintaining the connectivity properties.