Memory Tier Interconnect Patterning With Protected Wide Gaps
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Solution Overview
Problem
Forming conductive interconnects through a tier of memory architecture while maintaining the integrity of structural components, such as wordlines, is challenging due to difficulties in preserving conductive lines during etching processes.
Innovation Solution
The use of protective materials like silicon dioxide or high-k dielectrics to shield conductive segments in wide gaps during etching, allowing them to remain as conductive lines, and varying the cross-sectional shapes of conductive lines in wide versus narrow gaps to facilitate their formation and integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching processes are used to form conductive interconnects, then the etching can proceed through the memory tier, but the conductive lines in wide gaps are lost or damaged
Solution Approach 1:
The patent applies preliminary action by forming protective material segments over the conductive lines in wide gaps before the etching process. This pre-protection ensures that when the etch proceeds through the memory tier, the conductive lines are already shielded and will not be lost or damaged. The protective material is strategically placed in advance to prevent potential harm during the subsequent etching operation.
Solution Approach 2:
The patent uses protective material as an intermediary element between the etching process and the conductive lines. This intermediary layer acts as a mediator that allows the etch to proceed through the memory tier while simultaneously protecting the conductive lines from being damaged. The protective material transfers the harmful effect of the etch away from the conductive lines, enabling both the etching function and the preservation of conductive interconnects.
2Reliability
If protective material is applied to all gaps, then conductive lines are protected, but unnecessary material is deposited in narrow gaps where it is not needed
Solution Approach 1:
The patent applies local quality by providing protective material segments only in wide gaps where conductive lines need protection, while leaving narrow gaps without protective material. This localized approach ensures that protection is applied precisely where needed (in wide gaps with conductive lines) and avoids unnecessary material deposition in narrow gaps where conductive lines are not present or do not require protection. The selective application optimizes both protection effectiveness and material efficiency.
Data Source
AI summary
Some embodiments include a method of forming an integrated assembly. Semiconductor material is patterned into a configuration which includes a set of first upwardly-projecting structures spaced from one another by first gaps, and a second upwardly-projecting structure spaced from the set by a second gap. The second gap is larger than the first gaps. Conductive material is formed along the first and second upwardly-projecting structures and within the first and second gaps. First and second segments of protective material are formed over regions of the conductive material within the second gap, and then an etch is utilized to pattern the conductive material into first conductive structures within the first gaps and into second conductive structures within the second gap. Some embodiments include integrated assemblies.