Memory Interface Buffer Allocation for Multi-Master Systems
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional data processing systems face buffer conflicts when multiple master devices access data stored in data storage devices, leading to reduced prefetching effectiveness due to competition for buffer space, which can be mitigated by increasing the number of interface units but at the cost of increased die size and system interconnect ports.
Innovation Solution
Implementing a memory interface module with a data access control module that associates specific buffers with master device identifiers, allowing data to be stored in designated buffers based on the requesting master device, thereby reducing buffer conflicts without the need for additional interface ports.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If the number of interface units is increased to serve multiple master devices, then buffer conflicts are reduced, but die size and system interconnect ports increase
Solution Approach 1:
The patent segments the buffer resources by associating specific buffers with specific master device identifiers. This segmentation allows multiple master devices to access the same physical buffer pool without conflicts, as each master device is directed to its designated buffers based on its identifier, eliminating the need for multiple separate interface units while maintaining low buffer conflict rates
Solution Approach 2:
The patent makes a single interface unit serve multiple master devices by implementing buffer association logic that dynamically assigns buffers based on master device identifiers. This multi-functionality allows one interface unit to handle requests from multiple masters without buffer conflicts, replacing the need for dedicated interface units for each master device
2Object-generated harmful factors
If the number of interface units is increased to serve multiple master devices, then buffer conflicts are reduced, but the number of system interconnect ports increases
Solution Approach 1:
The patent merges the functionality of multiple interface units into a single interface unit by implementing buffer association based on master device identifiers. This consolidation allows one interface unit to serve multiple master devices that would otherwise require separate interface units, thereby reducing the number of system interconnect ports needed while maintaining effective buffer management
3Productivity
If conventional prefetching is used without buffer association, then buffer space is shared among all master devices, but buffer conflicts reduce prefetching effectiveness
Solution Approach 1:
The patent applies preliminary action by pre-establishing buffer associations with master device identifiers before data access occurs. When a master device requests data, the system already has predetermined which buffers are associated with that master, allowing immediate directed prefetching without buffer conflicts. This preliminary organization of buffer resources ensures prefetching effectiveness is maintained while eliminating conflicts
Data Source
AI summary
An integrated circuit device comprising at least one memory interface module arranged to be operably coupled between at least one data storage device and a plurality of master devices within a data processing system. The at least one memory interface module comprises a plurality of buffers and at least one data access control module. The at least one data access control module being arranged to fetch data from the at least one data storage device in response to a received memory access request comprising a master device identifier, select at least one buffer based at least partly on the master device identifier of the received access request, and load the fetched data into the selected at least one buffer.