Interface Circuit for Memory Power Management and Emulation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current memory systems lack the ability to efficiently manage power consumption and emulate memory circuits with different characteristics, such as capacity and timing, which can lead to increased power dissipation and reduced efficiency in memory modules.

Innovation Solution

An interface circuit is used to communicate with multiple memory circuits, simulating virtual memory circuits with different power behaviors by delaying signals and managing power states, allowing for power-saving operations and emulation of memory characteristics that differ from physical memory circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If memory circuits operate at full capacity without power management, then memory access speed is maintained, but power consumption increases

Engineering Contradiction:
Improvepower consumptionVSAvoidmemory access speed
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The patent implements dynamic power management by allowing memory circuits to transition between active and low-power states based on access patterns. The interface circuit manages power states dynamically, enabling memory circuits to enter low-power modes when not actively accessed while maintaining the ability to quickly resume operations, thus reducing overall power consumption without permanently sacrificing access speed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs periodic refresh operations for memory circuits in low-power states. Instead of continuous operation, memory circuits are refreshed at intervals while maintaining reduced power consumption. This periodic action allows the system to balance between maintaining data integrity and reducing power usage during idle periods.

Inventive Principle:
Principle #19Periodic action

2Adaptability or versatility

If physical memory circuits are used directly, then hardware complexity is minimized, but adaptability to different memory characteristics is reduced

Engineering Contradiction:
Improveemulation of memory characteristicsVSAvoidinterface circuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces an interface circuit as an intermediary between the system and physical memory circuits. This interface circuit acts as a mediator that translates between different memory characteristics and the actual physical memory behavior. It can emulate various memory types (SDRAM, DDR SDRAM, RDRAM) and present different capacities, timings, and organizational structures to the system while working with fixed physical memory circuits, thereby providing adaptability without requiring multiple physical memory types.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements virtual memory circuit emulation by creating software or firmware models that replicate the behavior of different memory circuits. These virtual models allow the system to interact with emulated memory characteristics that match the desired specifications, while the actual physical memory circuits remain unchanged. This copying approach enables adaptability through simulation rather than through hardware diversity.

Inventive Principle:
Principle #26Copying

3Use of energy by moving object

If signal delay is introduced for power management, then power consumption is reduced, but memory access timing is affected

Engineering Contradiction:
Improvepower consumptionVSAvoidmemory access timing
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The patent implements preliminary signal delay mechanisms that are configured in advance based on predicted memory access patterns. By pre-delaying signals appropriately before memory access operations, the system can enter low-power states more efficiently without causing timing violations during actual access operations. This preliminary action allows power management to be implemented without compromising the timing requirements of memory accesses.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10013371B2Configurable memory circuit system and method
Publication Date: 2018.07.03 GOOGLE LLC
  • US10013371B2 patent drawing
  • US10013371B2 patent drawing
  • US10013371B2 patent drawing

AI summary

A memory circuit system and method are provided in the context of various embodiments. In one embodiment, an interface circuit remains in communication with a plurality of memory circuits and a system. The interface circuit is operable to interface the memory circuits and the system for performing various functionality (e.g. power management, simulation/emulation, etc.).