Memory Interface Retraining Without Access Interruption
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Solution Overview
Problem
High-speed signaling links between processors and memory devices face challenges in maintaining error-free communication due to clock signal drift caused by temperature, humidity, and supply-voltage changes, leading to performance degradation and increased difficulty in interface retraining, especially in low-latency applications like Advanced Driver Assistance Systems.
Innovation Solution
A memory system design that allows for interface retraining without interrupting normal memory access by dividing the interface into two parts, one for normal access and the other for calibration, using training modes that reduce data bandwidth but maintain access granularity and latency, with separate training circuitry for clock, data, and command interfaces to adjust phase and frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If interface retraining is performed to maintain error-free communication, then reliability is improved, but productivity deteriorates due to interruption of normal memory operations
Solution Approach 1:
The interface is divided into multiple sub-interfaces (first sub-interface and second sub-interface), allowing retraining of one sub-interface while the other continues normal operations. This segmentation enables parallel operation of training and data transmission, resolving the contradiction between reliability improvement through retraining and productivity maintenance through continuous access.
Solution Approach 2:
The system dynamically switches between different sub-interfaces based on operational needs. During retraining, the active sub-interface is switched to the one not currently being trained, enabling continuous memory access. This dynamic switching resolves the contradiction by allowing the system to adapt its configuration in real-time.
2Productivity
If retraining is performed at higher speeds, then productivity is improved, but reliability deteriorates due to increased difficulty in maintaining precise timing
Solution Approach 1:
By segmenting the interface into multiple sub-interfaces, the patent enables parallel training and operation. The retraining process can be performed at reduced speeds on one sub-interface while the other sub-interface maintains high-speed operations, thus improving overall productivity without sacrificing timing precision reliability.
Solution Approach 2:
The system performs retraining periodically rather than continuously, allowing high-speed operations to continue during periods when retraining is not active. This periodic approach enables the system to maintain high productivity while ensuring reliability through periodic calibration.
3Reliability
If retraining is performed to account for environmental changes, then reliability is improved, but loss of time increases due to interruption of normal operations
Solution Approach 1:
The interface segmentation allows retraining to occur in parallel with normal operations. While one sub-interface is being trained to account for environmental changes, the other sub-interface continues to handle data transmission, thus improving reliability without causing operational downtime.
Solution Approach 2:
The patent maintains continuous useful action by enabling simultaneous training and operation through sub-interface segmentation. The training process does not interrupt normal memory access, thus improving communication stability while minimizing time loss.
4Reliability
If training modes reduce data bandwidth, then reliability is improved through better calibration, but productivity deteriorates due to reduced throughput
Solution Approach 1:
By segmenting the interface into multiple sub-interfaces, the patent allows one sub-interface to operate in training mode with reduced bandwidth for calibration while the other sub-interface maintains full bandwidth for data transmission. This resolves the contradiction by enabling simultaneous calibration accuracy improvement and throughput maintenance.
Solution Approach 2:
The system performs partial training on one sub-interface while the other sub-interface handles full data transmission requirements. This partial action approach allows sufficient calibration accuracy to be achieved without sacrificing overall productivity.
Data Source
AI summary
A memory system includes a memory controller in communication with a memory device via a communication links and a memory interface that can be retrained without interrupting memory access. In a normal operating mode, the entire interface is available to the controller in service of access (read and write) requests. When retraining is required, the memory controller commands the memory device to enter a training mode that divides the interface functionally into two parts that operate concurrently, one that is retrained and another that services normal access requests. The training mode offers a reduced data rate, relative to the normal mode, but also reduced latency relative to interrupting data traffic altogether for training.