Memory Interface Delay Tracking Circuit
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Solution Overview
Problem
Traditional memory interface systems face data degradation and integrity issues due to voltage and temperature variations at higher frequencies, requiring recalibration that disrupts data traffic and reduces efficiency.
Innovation Solution
A system that continuously tracks and corrects delays and margins in real-time using a comparator and tracker/corrector circuitry, allowing for uninterrupted data traffic and higher interface speeds without reducing frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional recalibration is performed to maintain data integrity, then data quality is improved, but data traffic is interrupted and efficiency is reduced
Solution Approach 1:
The patent implements continuous margin tracking and correction operations that run in the background without interrupting data traffic. The tracker and corrector circuitry continuously monitor margin variations and adjust delay elements in real-time, ensuring both data integrity maintenance and uninterrupted throughput.
Solution Approach 2:
The patent employs a feedback mechanism where the comparator continuously compares actual margin values against target values, and the tracker and corrector circuitry uses this comparison to dynamically adjust delay elements. This closed-loop feedback system automatically corrects margin drift without requiring external intervention or traffic interruption.
2Speed
If interface frequency is increased to improve speed, then data transmission rate is improved, but voltage and temperature variations cause data degradation
Solution Approach 1:
The patent implements dynamic margin adjustment capabilities that adapt to changing operating conditions in real-time. The tracker and corrector circuitry continuously monitor margin variations caused by voltage and temperature changes at high frequencies and dynamically adjust delay elements to maintain optimal margins, enabling sustained high-speed operation with improved reliability.
Solution Approach 2:
The patent changes the delay parameters of the data path and strobe path dynamically based on tracked margin variations. By adjusting these timing parameters in real-time, the system compensates for voltage and temperature effects that become more significant at higher frequencies, thereby maintaining data integrity while operating at high speeds.
3Measurement precision
If traditional recalibration is performed to correct delay variations, then timing accuracy is improved, but additional overhead time is required
Solution Approach 1:
The patent performs preliminary continuous tracking of margin variations using the tracker circuitry, which monitors and records delay variations as they occur during normal operation. This preliminary action allows the system to be prepared for correction without requiring interruptive recalibration cycles, thereby maintaining both high timing accuracy and minimal overhead.
Solution Approach 2:
The patent replaces periodic interruptive recalibration with continuous background tracking and correction operations. The tracker and corrector circuitry operate continuously during normal data traffic, eliminating the need to stop data flow for recalibration while maintaining accurate timing through ongoing monitoring and adjustment.
Data Source
AI summary
A method includes receiving a first and a second data from a first and second IO pad on a first and second data lines respectively. A data strobe is received from a third IO pad on a data strobe line. The first data and the second data are strobed based on the data strobe to generate a first and second strobed data. The first data from the first IO is received at the data strobe line and strobed based on the data strobe to form an another first strobed data and compared to the first strobed data to generate a comparison signal indicating whether adjustment to a delay of the first data line is needed. A delay command is generated to increase/decrease the delay of the first and second data line.


