Memory Interface Calibration for Multi-Mode Voltage and Impedance
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Solution Overview
Problem
Memory systems face challenges in supporting multiple signaling modes due to differences in common-mode voltages, which complicate the determination of driver and termination impedances, leading to errors and increased costs in component upgrades and inventory management.
Innovation Solution
A memory controller with a calibration circuit and control logic that selects reference voltages and impedances from pre-determined values associated with different signaling modes, using a Thevenin equivalent circuit and switching mechanisms to configure driver and termination impedances for accurate communication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a family of components is provided to support different signaling modes, then compatibility with diverse memory technologies is improved, but device complexity and inventory requirements increase
Solution Approach 1:
The patent implements a universal interface circuit that can operate in multiple signaling modes (DDR2, DDR3, GDDR3, etc.) by dynamically selecting reference voltages and impedances. Instead of providing separate components for each signaling mode, a single component family with configurable parameters achieves multi-functionality, reducing inventory requirements while maintaining compatibility with diverse memory technologies
Solution Approach 2:
The patent changes electrical parameters (reference voltage, driver impedance, termination impedance) to adapt to different signaling modes. By selecting from pre-determined values of these parameters, the interface can support multiple memory technologies without requiring different physical components, thus resolving the contradiction between versatility and complexity
2Productivity
If signaling mode is changed to upgrade memory components, then productivity and performance are improved, but device complexity increases due to different common-mode voltages
Solution Approach 1:
The patent pre-determines and stores sets of reference voltages and impedance values for different signaling modes before operation. During upgrades, the system simply selects from these pre-configured parameters rather than calculating them in real-time, reducing configuration complexity while enabling smooth transitions between signaling modes for memory upgrades
Solution Approach 2:
The patent implements dynamic selection of reference voltages and impedances based on the operating signaling mode. The interface can adapt its parameters in real-time to match the required signaling mode, making upgrades straightforward without requiring complex reconfiguration, thus improving productivity while managing device complexity
3Measurement precision
If impedance calibration is performed with incorrect common-mode voltage, then measurement precision deteriorates, but device complexity increases due to calibration requirements
Solution Approach 1:
The patent ensures that impedance calibration is performed at the correct common-mode voltage by selecting the appropriate reference voltage before calibration. This creates equipotential conditions for accurate measurement, ensuring that impedance determination is precise without requiring overly complex calibration circuits. The calibration circuit simply needs to select from pre-determined reference voltages matching the signaling mode
Data Source
AI summary
A memory controller includes a transmit circuit coupled to an output node and a receive circuit coupled to an input node. The transmit circuit transmits first data to a memory device through the output node and the receive circuit is configured to receive second data from the memory device through the input node. The memory controller includes a calibration circuit and control logic coupled to the calibration circuit, where the calibration circuit and the control logic are configured to select a first reference voltage and a driver impedance for the transmit circuit and are configured to select a second reference voltage and a termination impedance for the receive circuit. The first reference voltage, the second reference voltage, the driver impedance and the termination impedance are selected from a set of pre-determined values, which are associated with different signaling modes for communication of the first data and the second data.