Memory Interface Impedance Control for Stable Drive Strength
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Solution Overview
Problem
Existing memory interface circuits face driving ability issues when supply voltage changes, affecting chip performance and power consumption.
Innovation Solution
A memory interface circuit with first and second variable impedance circuits coupled between supply voltages and a pad, controlled by programmable reference voltage generators and comparators to adjust impedance settings in response to changing supply voltage, ensuring stable driving ability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the supply voltage is changed to control power consumption, then power consumption is reduced, but the driving ability of transmitters deteriorates
Solution Approach 1:
The patent applies dynamics by making the impedance of variable impedance circuits adjustable rather than fixed. When supply voltage changes, the control circuit dynamically reconfigures the impedance settings of the first and second variable impedance circuits to compensate for voltage variations, thereby maintaining stable transmitter driving ability across different power consumption states
Solution Approach 2:
The patent changes the impedance parameter of the variable impedance circuits in response to supply voltage changes. By adjusting the impedance values of the first and second variable impedance circuits based on detected voltage levels, the system compensates for voltage-induced performance degradation while maintaining the desired power consumption state
2Use of energy by moving object
If the supply voltage changes, then power consumption is controlled, but the access quality of the memory interface circuit deteriorates
Solution Approach 1:
The patent implements feedback by using a voltage detection circuit to monitor the supply voltage level and feeding this information back to the control circuit. The control circuit then adjusts the impedance settings of the variable impedance circuits based on the detected voltage, creating a closed-loop system that maintains access quality despite voltage variations and power consumption changes
Data Source
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Figure 3(a)~3(c)
AI summary
A memory interface circuit (112, 122) includes a first variable impedance circuit (210) coupled between a first supply voltage and a pad (230), and a second variable impedance circuit (220) coupled between a second supply voltage and the pad (230); wherein when the first supply voltage changes, at least one of the first variable impedance circuit (210) and the second variable impedance circuit (220) is controlled to have different setting in response to the changing of the first supply voltage.