Memory Physical Layer Interface Operating Point Adjustment

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Solution Overview

Problem

Conventional processing systems inaccurately correlate the operating points of memory physical layer interfaces with CPU or GPU operating points, leading to unnecessary power consumption and performance degradation in compute-intensive scenarios, as they assume higher memory performance is always required with increased CPU or GPU activity.

Innovation Solution

The operating point of the memory physical layer interface is dynamically adjusted based on the average bandwidth utilization, allowing it to remain in a low performance state when bandwidth is low and increase when bandwidth is high, thereby conserving power and reallocating it to CPU or GPU as needed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the operating point of the memory physical layer interface is increased to match higher CPU or GPU operating points, then memory performance is improved, but power consumption increases unnecessarily when memory bandwidth utilization is low

Engineering Contradiction:
Improvememory performanceVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by making the memory physical layer interface operating point variable rather than static. The system continuously monitors memory bandwidth utilization and dynamically adjusts the operating point (frequency and voltage) of the memory physical layer interface to match actual demand. When bandwidth utilization is low, the operating point is reduced to save power; when utilization is high, the operating point is increased to maintain performance, thus resolving the contradiction between maintaining high memory performance and avoiding unnecessary power consumption.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies parameter changes by modifying the operating parameters (frequency and voltage) of the memory physical layer interface based on measured bandwidth utilization. The system changes these parameters in response to utilization thresholds, allowing the memory interface to operate at lower frequency/voltage when not fully utilized, thereby reducing power consumption while maintaining adequate performance when needed.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the operating point of the memory physical layer interface is increased to ensure adequate memory performance, then system reliability is improved, but CPU or GPU performance degrades due to power budget constraints

Engineering Contradiction:
Improvememory performance adequacyVSAvoidCPU or GPU performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system dynamically balances power allocation between memory and compute units by monitoring bandwidth utilization. When memory utilization is low, the memory physical layer interface operating point is reduced, freeing power budget for CPU/GPU operations, thus improving overall system productivity while maintaining adequate memory performance through on-demand scaling.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements feedback by continuously measuring memory bandwidth utilization and using this information to adjust the memory physical layer interface operating point. This closed-loop control ensures that memory performance remains adequate by increasing the operating point when utilization is high, while allowing power to be reallocated to CPU/GPU when utilization is low, thus resolving the contradiction between reliability and productivity.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9298243B2Selection of an operating point of a memory physical layer interface and a memory controller based on memory bandwidth utilization
Publication Date: 2016.03.29 ADVANCED MICRO DEVICES INC
  • US9298243B2 patent drawing
  • US9298243B2 patent drawing
  • US9298243B2 patent drawing

AI summary

The present application describes embodiments of a method that includes modifying an operating point of at least one of a memory physical layer interface or a memory controller in response to changes in bandwidth utilization of the memory physical layer interface. The present application also describes embodiments of an apparatus that includes a memory controller, a memory physical layer interface, and a power management controller to modify an operating point of at least one of the memory physical layer interface or the memory controller in response to changes in bandwidth utilization of the memory physical layer interface.