Graphic Memory Interface PAM-4 Encoding With Maximum Transition Avoidance

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Solution Overview

Problem

High-speed graphic memory interfaces face challenges with signal integrity due to inter-symbol interference and crosstalk, particularly when using PAM-4 encoding which is more susceptible to noise and maximum voltage transitions.

Innovation Solution

The implementation of a hybrid PAM-4 encoding scheme with an Error Detection Code (EDC) channel, utilizing Maximum Transition Avoidance (MTA) techniques to mitigate crosstalk and simultaneous switching noise by encoding data and CRC bits in a way that avoids maximum voltage transitions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If PAM-4 encoding is used to increase communication bandwidth, then data transmission speed is improved, but susceptibility to noise and inter-symbol interference increases

Engineering Contradiction:
Improvecommunication bandwidthVSAvoidsignal integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies parameter changes by modifying the voltage transition patterns in PAM-4 encoding. Specifically, it implements Maximum Transition Avoidance (MTA) techniques that control the frequency and magnitude of voltage transitions between symbols, thereby reducing inter-symbol interference and crosstalk while maintaining the four-level voltage structure needed for high bandwidth

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses preliminary action by pre-coding the data stream to predict and avoid maximum voltage transitions before they occur. The encoder analyzes upcoming symbols and adjusts the encoding in advance to prevent excessive transitions, proactively mitigating noise and interference issues before they degrade signal integrity

Inventive Principle:
Principle #10Preliminary action

2Speed

If maximum voltage transitions occur between PAM encoded symbols, then data transmission rate is maintained, but crosstalk and inter-symbol interference increase

Engineering Contradiction:
Improvedata transmission rateVSAvoidcrosstalk and inter-symbol interference
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The patent modifies the voltage transition parameters by implementing transition avoidance logic that limits the frequency of maximum amplitude changes between consecutive symbols. This parameter control reduces electromagnetic coupling between adjacent channels (crosstalk) and minimizes distortion from inter-symbol interference while preserving the overall data rate through efficient encoding

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies skipping by selectively bypassing maximum voltage transitions when they would cause harmful interference. The encoder detects patterns that would result in maximum transitions and skips these transitions by using alternative encoding paths, rushing through problematic transitions to maintain signal quality without significantly impacting throughput

Inventive Principle:
Principle #21Skipping (Rushing through)

Data Source

PatentUS12347508B2Error detection pin encoding scheme to avoid maximum transitions and further improve signal integrity on high speed graphic memory interfaces
Publication Date: 2025.07.01 NVIDIA CORP
  • US12347508B2 patent drawing
  • US12347508B2 patent drawing
  • US12347508B2 patent drawing

AI summary

First symbols are generated on a plurality of data channels by applying PAM-N encoding on a first subset of bits of a data burst, the first symbols generated without maximum transitions; second symbols are generated on at least one optionally-activated additional data channel, the second symbols generated by applying the PAM-N encoding on a second subset of bits of the data burst, the second symbols generated without maximum transitions; and third symbols are generated on a channel for communicating error correction bits for the first bits and second bits, the third symbols generated by applying hybrid PAM-N encoding on the error correction bits and a third subset of bits of the data burst, the hybrid PAM-N encoding comprising an interleaving of symbols with N voltage levels and symbols with less than N voltage levels.