Memory Interface Circuitry for DDR Skew Compensation
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Solution Overview
Problem
In programmable integrated circuits, variations in circuit board traces and operating conditions lead to skew between data and clock paths, resulting in degraded setup and hold times during memory operations, especially in high-speed DDR transfers.
Innovation Solution
The memory interface circuitry includes first and second data sampling circuits, a comparator circuit, and control circuitry to alternate between active and redundant modes, using phase interpolation to adjust the data strobe signal and ensure proper timing alignment, thereby compensating for skew and maintaining optimal setup and hold times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional startup calibration is performed, then initial skew between data and data strobe signals is minimized, but random skew reappears during normal operation due to voltage and temperature variations
Solution Approach 1:
The patent implements a feedback mechanism where data eye boundary information is continuously monitored during normal operation. The control logic receives feedback about timing skew conditions and dynamically adjusts the data strobe signal phase to maintain optimal setup and hold times, preventing the degradation that occurs after initial calibration.
Solution Approach 2:
The system transitions from static startup calibration to dynamic runtime calibration. The data strobe signal phase is continuously adjustable based on real-time monitoring of data eye boundaries, allowing the system to adapt to changing voltage and temperature conditions during normal operation.
2Reliability
If runtime data eye monitoring is implemented, then continuous calibration is achieved, but device complexity increases due to additional sampling circuits and control logic
Solution Approach 1:
The patent employs dual data sampling circuits that serve multiple functions: one circuit handles normal data latching while the other performs data eye boundary monitoring. This multi-functionality reduces the need for completely separate monitoring infrastructure, thereby limiting the increase in device complexity.
Solution Approach 2:
The system creates a redundant copy of the data sampling path dedicated to monitoring purposes. Instead of adding complex monitoring to the existing single sampling circuit, a parallel copying approach is used where one sampling circuit handles normal operation and the other handles calibration, simplifying the overall design.
3Manufacturing precision
If data strobe calibration is performed during startup, then initial timing is optimized, but it cannot compensate for variations during normal user operation
Solution Approach 1:
The system performs self-calibration during normal operation by continuously monitoring data eye boundaries and automatically adjusting the data strobe phase. The calibration function serves itself by using the existing data sampling infrastructure to detect timing skew and trigger appropriate corrections without external intervention.
Solution Approach 2:
The calibration process transitions from a one-time startup action to a continuous operation during normal user activity. Data eye monitoring and strobe phase adjustment occur continuously or periodically throughout normal operation, ensuring timing optimization is maintained despite changing conditions.
Data Source
AI summary
Integrated circuits may include memory interface circuitry operable to communicate with system memory. The memory interface circuitry may receive data (DQ) and data strobe (DQS) signals from system memory during read operations. The memory interface circuitry may include startup calibration circuitry and runtime calibration circuitry. The startup calibration circuitry may be used upon device startup to perform a one-time data de-skew and DQ/DQS centering. The runtime calibration circuitry may include at least two data sampling circuits, a first of which is used in active mode to latch incoming data and a second of which is used in redundant mode to obtain data eye boundary information on a continuous basis. The received DQS signal may be adjusted based on the obtained eye boundary information so that DQS properly positioned within the data eye periodically or on an as-needed basis.