Memory Interface Switching for SSD Heat and Power Control

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Solution Overview

Problem

The rapid increase in data transfer rates between memory storage devices and host systems leads to adverse effects such as increased device temperature and power consumption, triggering thermal shutdown and reducing performance per watt, especially when high-speed transmission is not required.

Innovation Solution

A device control method and memory control circuit unit that adjusts the connection interface standard based on device status information, including operations like garbage collection, wear leveling, and error handling, to optimize data transfer volume and improve energy conversion rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If high-speed connection interface standard is used, then data transfer rate is improved, but device temperature and power consumption increase

Engineering Contradiction:
Improvedata transfer rateVSAvoiddevice temperature
Core Design Contradiction:
SpeedVSTemperature

Solution Approach 1:

The patent applies dynamics by making the connection interface standard adjustable rather than fixed. The memory control circuit dynamically switches between different connection interface standards (e.g., PCI Express Gen 1 to Gen 5) based on real-time device status, allowing the system to adapt the data transfer rate to actual operational needs, thereby reducing unnecessary heat generation while maintaining performance when required

Inventive Principle:
Principle #15Dynamics

2Speed

If high-speed connection interface standard is used, then data transfer rate is improved, but power consumption increases

Engineering Contradiction:
Improvedata transfer rateVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The system dynamically adjusts the connection interface standard based on device status information, switching between high-speed and lower-speed modes depending on actual operational requirements. This prevents continuous operation at maximum speed when not needed, thereby reducing unnecessary power consumption while maintaining the capability for high-speed transfer when performance is required

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameter of connection interface standard based on device status. By monitoring whether the device is performing default operations and adjusting the interface standard accordingly, the system optimizes the balance between data transfer rate and power consumption, improving energy efficiency without sacrificing performance when needed

Inventive Principle:
Principle #35Parameter changes

3Speed

If high-speed connection interface standard is used, then data transfer rate is improved, but performance per watt decreases

Engineering Contradiction:
Improvedata transfer rateVSAvoidperformance per watt
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The memory control circuit dynamically adjusts the connection interface standard based on real-time device status monitoring. When default operations are detected, the system switches to appropriate interface standards that optimize the balance between data transfer rate and power consumption, thereby improving performance per watt while maintaining the capability for high-speed operation when necessary

Inventive Principle:
Principle #15Dynamics

4Loss of energy

If connection interface standard is adjusted, then energy conversion rate is improved, but device complexity increases

Engineering Contradiction:
Improveenergy conversion rateVSAvoidcontrol complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The memory control circuit autonomously monitors device status and automatically adjusts the connection interface standard without requiring external intervention. The system self-determines when to switch between different interface standards based on detected operations, simplifying the overall control architecture while achieving energy optimization

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system implements feedback control by continuously monitoring device status information and using this feedback to adjust the connection interface standard. This closed-loop approach allows the system to respond to changing operational conditions and optimize energy conversion rates while managing complexity through automated feedback-based decision making

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250348443A1Device control method, memory storage device and memory control circuit unit
Publication Date: 2025.11.13 PHISON ELECTRONICS
  • US20250348443A1 patent drawing
  • US20250348443A1 patent drawing
  • US20250348443A1 patent drawing

AI summary

A device control method, a memory storage device and a memory control circuit unit are provided. The device control method includes: obtaining device status information of the memory storage device, and the device status information reflects whether the memory storage device is performing a default operation; and adjusting a connection interface standard used by a connection interface unit of the memory storage device from a first connection interface standard to a second connection interface standard according to the device status information, and the first connection interface standard is different from the second connection interface standard.