Distributed Shared Memory Interleave Ceiling Mask
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Solution Overview
Problem
Existing distributed shared memory multiprocessor systems face memory hotspots and increased latency due to coarse-grained interleave, which leads to bandwidth bottlenecks and inefficient memory access, especially when shared code and data structures are accessed by multiple nodes.
Innovation Solution
Implementing a method that allocates a distributed shared memory system with both fine-grain and coarse-grain interleave block sizes, using a ceiling mask register to set boundaries between these interleave regions, allowing for optimized memory access by distributing memory traffic across nodes and reducing latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If coarse-grained interleave is used, then memory access latency is reduced for local memory, but memory hotspots increase and bandwidth requirements increase
Solution Approach 1:
The patent segments the distributed shared memory into two distinct interleaved memory spaces: a first interleaved memory space with fine-grained interleaving and a second interleaved memory space with coarse-grained interleaving. This segmentation allows different memory access patterns to be served by different interleaving granularities, resolving the contradiction between reducing latency (coarse-grained) and avoiding hotspots (fine-grained).
Solution Approach 2:
The patent applies different interleaving qualities to different memory regions. The fine-grained interleaving is applied to the first memory space to distribute hotspots, while the coarse-grained interleaving is applied to the second memory space to minimize latency for local accesses. This local differentiation of quality resolves the contradiction by matching the interleaving granularity to the specific access patterns of different memory regions.
2Speed
If coarse-grained interleave is used, then memory access is faster for local memory, but bandwidth demands on the interconnect network increase
Solution Approach 1:
The patent segments memory access traffic into two paths: one through the fine-grained interleaved memory space and another through the coarse-grained interleaved memory space. This segmentation allows the system to serve different bandwidth requirements through different paths, reducing the overall bandwidth demand on the interconnect network while maintaining fast local access speeds.
Solution Approach 2:
The patent applies coarse-grained interleaving only partially to the second memory space rather than universally. This partial application allows the system to maintain fast local access for critical memory regions while avoiding the excessive bandwidth demands that would result from applying coarse-grained interleaving to all memory spaces.
3Object-generated harmful factors
If fine-grained interleave is used, then memory hotspots are reduced, but memory access latency increases for remote memory
Solution Approach 1:
The patent segments the memory system into two interleaved spaces with different granularities. The fine-grained interleaving in the first memory space effectively distributes hotspots, while the coarse-grained interleaving in the second memory space minimizes latency for remote accesses. This segmentation allows both goals to be achieved simultaneously by matching the interleaving strategy to the access pattern.
Solution Approach 2:
The patent applies fine-grained interleaving quality to the first memory space to reduce hotspots, while applying coarse-grained interleaving quality to the second memory space to reduce latency. This local differentiation of quality allows the system to optimize for different objectives in different regions, resolving the contradiction between hotspot reduction and latency minimization.
Data Source
AI summary
A distributed shared memory multiprocessor system that supports both fine- and coarse- grained interleaving of the shared memory address space. A ceiling mask sets a boundary between the fine-grain interleaved and coarse-grain interleaved memory regions of the distributed shared memory. A method for satisfying a memory access request in a distributed shared memory subsystem of a multiprocessor system having both fine- and coarse-grain interleaved memory segments. Certain low or high order address bits, depending on whether the memory segment is fine- or coarse-grain interleaved, respectively, are used to determine if the memory address is local to a processor node. A method for setting the ceiling mask of a distributed shared memory multiprocessor system to optimize performance of a first application run on a single node and performance of a second application run on a plurality of nodes.