Memory Interleave Control for Cross-Module Wear Leveling

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Solution Overview

Problem

Existing memory systems face challenges in efficiently managing wear leveling across multiple memory modules, particularly in low durability storage devices like NAND-type flash memory, leading to uneven wear distribution and potential performance degradation.

Innovation Solution

A memory system with a controller that implements inter-module wear leveling by dynamically managing memory resources, using a copy-on-write process to redistribute data across logical devices based on accumulated wear, adjusting interleave settings to balance wear across modules.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is stored in a single memory module, then write amplification is reduced and performance is improved, but wear is concentrated on that single module leading to shorter lifespan

Engineering Contradiction:
Improvewrite amplificationVSAvoidwear distribution
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system segments memory storage across multiple memory modules (first memory module and second memory module) and uses interleave settings to divide data into different regions. This segmentation allows data to be distributed across multiple physical modules while maintaining logical address continuity, thereby reducing wear on any single module while avoiding excessive write amplification.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically adjusts interleave settings based on wear levels of different memory modules. The controller monitors wear information and selectively changes interleave configurations to redirect data away from heavily worn modules to less worn modules, enabling adaptive wear leveling without requiring full data migration.

Inventive Principle:
Principle #15Dynamics

2Reliability

If wear leveling is implemented across multiple memory modules, then wear distribution is improved, but data migration complexity and processing overhead increase

Engineering Contradiction:
Improvewear distributionVSAvoiddata migration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of migrating all data during wear leveling operations, the system performs partial migrations only for data regions that need rebalancing. The interleave setting changes selectively affect only specific memory regions, allowing wear leveling to occur with minimal data movement and reduced processing overhead.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system changes interleave parameters (such as interleave depth and offset values) to redirect data placement patterns. By modifying these parameters rather than physically moving data, the system achieves wear distribution improvement through logical address remapping, significantly reducing migration complexity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20260003514A1Memory system
Publication Date: 2026.01.01 KIOXIA CORP
  • US20260003514A1 patent drawing
  • US20260003514A1 patent drawing
  • US20260003514A1 patent drawing

AI summary

According to one embodiment, a memory system includes a first memory region, a second memory region, and a controller. The controller is configured to control coupling between the first memory region and the second memory region at one end and a host device at another, generate first interleave setting information corresponding to the first memory region, select the first memory region based on the first interleave setting information when an access request is received from the host device, and update the first interleave setting information to second interleave setting information corresponding to the second memory region and not corresponding to the first memory region based on an amount of accumulated wear in the first memory region.