Memory Interposer Controller for Processor Memory Expansion
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Solution Overview
Problem
High-performance computing servers face increased costs due to the need for additional processors to access memory, as motherboard designs often require specific processor configurations for memory access, leading to unnecessary expenses and performance bottlenecks.
Innovation Solution
A memory interposer with a memory controller circuit is used to connect processors to existing memory modules via high-speed interfaces like CXL or PCIe, allowing processors to access additional memory without requiring additional processors, thus reducing costs and improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If additional processors are added to access memory on motherboards with reserved memory access, then memory accessibility is improved, but system cost and device complexity increase significantly
Solution Approach 1:
The patent introduces a memory interposer as an intermediary device that sits between the processor and memory modules. The interposer includes a memory controller that mediates memory access requests, allowing the processor to access memory without requiring additional processors. This intermediary component resolves the contradiction by providing memory accessibility while avoiding the complexity of multi-processor configurations.
Solution Approach 2:
The patent extracts the memory controller function from the processor itself and places it in a separate interposer component. This extraction allows the processor to access memory through the interposer without needing additional processor units, thereby improving memory accessibility while keeping the processor configuration simple and avoiding increased system complexity.
2Quantity of substance
If additional processors are purchased to access memory, then memory capacity access is improved, but economic cost increases prohibitively
Solution Approach 1:
The memory interposer serves as a cost-effective intermediary that enables access to additional memory capacity without requiring expensive additional processors. The interposer includes a memory controller that handles memory access requests, providing the needed memory capacity access while avoiding the high economic cost of purchasing and configuring additional processor units.
Solution Approach 2:
The memory interposer provides universal memory access capability that works with existing processor configurations. Rather than requiring specialized additional processors, the interposer offers a multi-functional solution that enables memory capacity expansion while maintaining compatibility with standard processors, thereby reducing system cost.
3Ease of operation
If motherboard design reserves on-board memory access to specific processors, then memory access control is improved, but processor utilization efficiency deteriorates
Solution Approach 1:
The memory interposer acts as an intermediary layer that maintains controlled memory access while improving processor utilization. The memory controller in the interposer manages access requests from processors, preserving the controlled access architecture while enabling existing processors to efficiently utilize additional memory capacity without requiring reserved processor configurations.
Solution Approach 2:
The patent segments the memory control function from the processor and places it in a dedicated interposer component. This segmentation allows memory access control to be maintained through the interposer's memory controller while enabling processors to efficiently access memory resources without being constrained by reserved processor configurations, thereby improving processor utilization efficiency.
Data Source
AI summary
A system and device for expanding accessible memory of a processor is provided. An interposer is coupled to the processor and a memory module. The interposer is coupled to a first connection and a second connection. The interposer includes a memory controller circuit. The memory controller circuit receives signals from the processor, using the first connection, and transmits the received signals to the memory module, using the second connection. The interposer expands memory access without an unnecessary second processor.