Memory Invalidation Bit Circuit for Secure Data Erase
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Solution Overview
Problem
In nonvolatile memory systems, overwriting data is impractical, leading to overhead when writing new data while preserving valid data, and there is no effective way to prevent access to old data, which can leak out through abnormal routes, especially during secure file erase operations.
Innovation Solution
A memory device with an invalidation bit circuit that updates invalid data bits to block read operations, preventing access to old data by marking it as invalid, thereby enhancing security and reducing overhead in secure file erase operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is deleted by removing mapping information only, then write performance is improved, but security against unauthorized access to old data deteriorates
Solution Approach 1:
The patent segments the data protection mechanism into two independent parts: mapping information management and validity flag management. The validity flag is stored separately from the mapping information, allowing the system to maintain mapping for performance while using the flag to control access and prevent unauthorized reading of deleted data.
Solution Approach 2:
The validity flag acts as an intermediary between the mapping information and the actual data read operation. Before data can be read, the validity flag is checked to determine if the data is authorized for access, thereby preventing unauthorized access to old data while maintaining the mapping structure.
2Reliability
If secure file erase is implemented by finding and deleting old data, then data security is improved, but device overhead increases
Solution Approach 1:
The system performs preliminary action by setting the validity flag to invalid at the time of deletion. This preliminary marking eliminates the need for subsequent complex operations to find and delete old data, as the validity flag pre-establishes the security state and simplifies future read operations to simple flag checks.
3Stability of the object's composition
If multiple versions of data are maintained at different physical addresses, then data integrity is preserved, but security against unauthorized access deteriorates
Solution Approach 1:
The patent applies local quality by associating a specific validity flag with each physical address or data version. This allows different quality states (valid/invalid) to be applied locally to different data versions, enabling the system to maintain multiple versions for integrity while controlling access to each version individually through its corresponding validity flag.
Data Source
AI summary
A memory device, as provided herein, may include an invalidation bit circuit and a cell array. In methods for controlling such memory devices, the invalidation bit circuit may receive an invalid control command from a memory controller to update the invalid bit data to one of first and second states different from each other, the invalidation bit circuit may receive a read control command from the memory controller and may provide an invalid signal when the invalid bit data is in the first state, the invalidation bit circuit may transmit a data request when the invalid bit data is in the second state, and the cell array may receive the data request and provide data.