Memory IO Buffer Pullup Control for PVT-Based Rise Time Tuning
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Solution Overview
Problem
Existing memory devices face challenges in dynamically adjusting the rise time of data output due to varying process, temperature, and voltage (PVT) conditions, leading to insufficient calibration of pullup transistors, which affects data transient performance.
Innovation Solution
Dynamic customization of pullup transistor size and threshold voltage based on real-time PVT data, using logic to select the appropriate number of transistors and apply substrate bias, ensuring precise VOH-level calibration and compensation for different data transient speeds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed number of additional pullup transistors are added to improve rise time, then the output high voltage level is improved, but the solution becomes insufficient under varying PVT conditions
Solution Approach 1:
The patent implements dynamic control of pullup transistor activation based on real-time PVT conditions. Instead of using a fixed number of pullup transistors, the system selectively activates additional pullup transistors from a bank based on measured process, voltage, and temperature conditions. This dynamic approach allows the rise time to be adjusted according to actual operating conditions, resolving the contradiction between maintaining reliable VOH levels and adapting to PVT variations.
Solution Approach 2:
The patent changes the operational parameters of the pullup transistor circuit by varying the number of active pullup transistors based on PVT measurements. The system measures PVT parameters and dynamically adjusts the effective pullup strength by enabling or disabling specific transistors from the bank, thereby adapting the circuit behavior to match actual operating conditions and maintain reliable output voltage levels.
2Speed
If additional pullup transistors are added to compensate for slow data transient, then the rise time is improved, but overshoot and ringing occur for fast data transient
Solution Approach 1:
The patent dynamically adjusts the number of active pullup transistors based on the actual rise time requirements detected during operation. For slow data transients, additional pullup transistors are activated to accelerate the rise time. For fast data transients, fewer pullup transistors are activated to prevent overshoot and ringing. This dynamic control allows the system to optimize rise time while avoiding harmful effects under different operating conditions.
Solution Approach 2:
The system changes the effective pullup strength parameter by selectively activating different numbers of pullup transistors from the bank. This parameter adjustment is based on real-time measurement of data transient characteristics, allowing the system to match the pullup strength to the actual rise time requirements and prevent overshoot while maintaining fast transient response when needed.
3Measurement precision
If pullup transistors are calibrated based on training with external ZQ resistor, then the VOH level is established, but the calibration is insufficient under varying PVT values
Solution Approach 1:
The patent implements a feedback mechanism where PVT parameters are continuously measured and used to adjust the activation of pullup transistors. The system measures actual PVT conditions and feeds this information back to the control logic, which then adjusts the number of active pullup transistors accordingly. This closed-loop feedback approach maintains accurate VOH calibration across varying PVT conditions, overcoming the limitations of static calibration based on external ZQ resistors.
Solution Approach 2:
The system dynamically changes the operational parameters of the pullup transistor circuit based on measured PVT values. Instead of relying solely on static calibration, the system adjusts the effective pullup strength by enabling or disabling specific transistors from the bank based on real-time PVT measurements, thereby maintaining calibration accuracy across varying process, voltage, and temperature conditions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances data eye diagram definition and accurate data sampling by compensating for varying PVT conditions, improving data transmission reliability and efficiency in memory devices.
Implementation Method 1
The IO buffer may include a voltage regulator to generate the bias voltage. The logic may be configured to selectively apply the bias voltage to a substrate of the bank of pullup transistors, based on the PVT data
Data Source
AI summary
A memory device includes an array of memory cells of non-volatile memory and an input/output (IO) buffer coupled to the array. The IO buffer comprises a primary pullup transistor coupled between a power supply and ground and coupled to a data quick (DQ) output line. The IO buffer includes selectable pullup transistors coupled in parallel with the primary pullup transistor. The IO buffer includes logic coupled to the selectable pullup transistors. The logic selects a customized number of the selectable pullup transistors, based on process, voltage, temperature (PVT) data associated with the memory device, for use during a transient period of data transmission at the DQ output line.