Memory I/O Line Selection for Faster Multi-Device Testing
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Solution Overview
Problem
In memory systems, the increased number of memory devices in a single module leads to longer test times due to the need for repeated testing of each device with different data lines, and memory controllers face challenges in inputting data to specific data lines within memory devices.
Innovation Solution
A memory device with a data input/output circuit that receives and outputs data through a plurality of input/output lines, allowing for logic operations and selecting corresponding input/output lines based on bit values or input/output line codes, enabling consistent data input across memory devices with different data line configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is written to memory cells using external test device and read back for comparison, then defect detection is achieved, but test time becomes excessively long due to repeated testing of multiple memory devices with different data lines
Solution Approach 1:
The data input/output circuit is designed to perform multiple functions: it can receive data from external data pins, perform logic operations on the received data, and output the processed data to corresponding input/output lines. This multi-functionality allows a single circuit to handle various data line configurations across multiple memory devices, eliminating the need for separate testing procedures for each device type and thereby reducing overall test time while maintaining defect detection capability
Solution Approach 2:
The circuit changes the parameters of the received data by performing logic operations (such as inversion or complementation) on the data bits. This parameter transformation allows the same physical data line to be used for testing different memory devices with different data line configurations, reducing the number of repeated tests needed while ensuring accurate defect detection
2Adaptability or versatility
If memory controller attempts to input predetermined data to specific data lines of memory devices, then data line configuration flexibility is improved, but device complexity increases due to the need for additional control mechanisms
Solution Approach 1:
The data input/output circuit automatically determines which input/output line to use based on the bit values of the received data itself. The circuit performs self-service by using the data's own characteristics (bit values) to routing decisions, eliminating the need for external memory controllers to implement complex control mechanisms for data line configuration. This self-determining approach maintains adaptability while reducing overall system complexity
Data Source
AI summary
A memory device includes a memory cell array and a data input/output circuit. The memory cell array includes a plurality of memory cells connected to a plurality of bit lines and a plurality of word lines. The data input/output circuit is configured to receive data from external data pins of the memory device, output the received data to the memory cell array through a plurality of input/output lines electrically coupled to the plurality of bit lines, receive data read from the memory cell array through the plurality of input/output lines, and output the read data through the external data pins. For each external data pin, the data input/output circuit is configured to output data received at the external data pin to a corresponding input/output line. The corresponding input/output line is selected in response to bit values of a set of bits included in the received data.